Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 8fa82790 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm 

* 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm:
  [ARM] fix 48d7927b
  [ARM] 5010/1: htc-pasic3: remove unused defines and includes
  [ARM] pxa: fix 0e623941
  [ARM] fix lh7a40x/kev7a400 build
parents 2444e56b 4a1fd556

arch/arm/mach-lh7a40x/arch-kev7a400.c

+2 −3
Original line number Diff line number Diff line
@@ -75,10 +75,9 @@ static void kev7a400_cpld_handler (unsigned int irq, struct irq_desc *desc) 
{

	u32 mask = CPLD_LATCHED_INTS;

	irq = IRQ_KEV7A400_CPLD;

	for (; mask; mask >>= 1, ++irq) {

	for (; mask; mask >>= 1, ++irq)

		if (mask & 1)

			desc[irq].handle (irq, desc);

	}

			desc_handle_irq(irq, desc);

}



void __init lh7a40x_init_board_irq (void)

arch/arm/mm/Kconfig

+6 −0
Original line number Diff line number Diff line
@@ -32,6 +32,7 @@ config CPU_ARM7TDMI 
	depends on !MMU

	select CPU_32v4T

	select CPU_ABRT_LV4T

	select CPU_PABRT_NOIFAR

	select CPU_CACHE_V4

	help

	  A 32-bit RISC microprocessor based on the ARM7 processor core
@@ -85,6 +86,7 @@ config CPU_ARM740T 
	depends on !MMU

	select CPU_32v4T

	select CPU_ABRT_LV4T

	select CPU_PABRT_NOIFAR

	select CPU_CACHE_V3	# although the core is v4t

	select CPU_CP15_MPU

	help
@@ -101,6 +103,7 @@ config CPU_ARM9TDMI 
	depends on !MMU

	select CPU_32v4T

	select CPU_ABRT_NOMMU

	select CPU_PABRT_NOIFAR

	select CPU_CACHE_V4

	help

	  A 32-bit RISC microprocessor based on the ARM9 processor core
@@ -200,6 +203,7 @@ config CPU_ARM940T 
	depends on !MMU

	select CPU_32v4T

	select CPU_ABRT_NOMMU

	select CPU_PABRT_NOIFAR

	select CPU_CACHE_VIVT

	select CPU_CP15_MPU

	help
@@ -217,6 +221,7 @@ config CPU_ARM946E 
	depends on !MMU

	select CPU_32v5

	select CPU_ABRT_NOMMU

	select CPU_PABRT_NOIFAR

	select CPU_CACHE_VIVT

	select CPU_CP15_MPU

	help
@@ -351,6 +356,7 @@ config CPU_XSC3 
	default y

	select CPU_32v5

	select CPU_ABRT_EV5T

	select CPU_PABRT_NOIFAR

	select CPU_CACHE_VIVT

	select CPU_CP15_MMU

	select CPU_TLB_V4WBI if MMU

arch/arm/mm/proc-arm1020.S

+1 −1
Original line number Diff line number Diff line
@@ -471,6 +471,7 @@ arm1020_crval: 
	.type	arm1020_processor_functions, #object

arm1020_processor_functions:

	.word	v4t_early_abort

	.word	pabort_noifar

	.word	cpu_arm1020_proc_init

	.word	cpu_arm1020_proc_fin

	.word	cpu_arm1020_reset
@@ -478,7 +479,6 @@ arm1020_processor_functions: 
	.word	cpu_arm1020_dcache_clean_area

	.word	cpu_arm1020_switch_mm

	.word	cpu_arm1020_set_pte_ext

	.word	pabort_noifar

	.size	arm1020_processor_functions, . - arm1020_processor_functions



	.section ".rodata"

arch/arm/mm/proc-arm1020e.S

+1 −1
Original line number Diff line number Diff line
@@ -452,6 +452,7 @@ arm1020e_crval: 
	.type	arm1020e_processor_functions, #object

arm1020e_processor_functions:

	.word	v4t_early_abort

	.word	pabort_noifar

	.word	cpu_arm1020e_proc_init

	.word	cpu_arm1020e_proc_fin

	.word	cpu_arm1020e_reset
@@ -459,7 +460,6 @@ arm1020e_processor_functions: 
	.word	cpu_arm1020e_dcache_clean_area

	.word	cpu_arm1020e_switch_mm

	.word	cpu_arm1020e_set_pte_ext

	.word	pabort_noifar

	.size	arm1020e_processor_functions, . - arm1020e_processor_functions



	.section ".rodata"

arch/arm/mm/proc-arm1022.S

+1 −1
Original line number Diff line number Diff line
@@ -435,6 +435,7 @@ arm1022_crval: 
	.type	arm1022_processor_functions, #object

arm1022_processor_functions:

	.word	v4t_early_abort

	.word	pabort_noifar

	.word	cpu_arm1022_proc_init

	.word	cpu_arm1022_proc_fin

	.word	cpu_arm1022_reset
@@ -442,7 +443,6 @@ arm1022_processor_functions: 
	.word	cpu_arm1022_dcache_clean_area

	.word	cpu_arm1022_switch_mm

	.word	cpu_arm1022_set_pte_ext

	.word	pabort_noifar

	.size	arm1022_processor_functions, . - arm1022_processor_functions



	.section ".rodata"