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Commit 8f1ad1ef authored by Michal Wajdeczko's avatar Michal Wajdeczko Committed by Chris Wilson
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drm/i915/uc: Trivial s/dev_priv/i915 in intel_uc.c 



Some functions already use i915 name instead of dev_priv.
Let's rename this param in all remaining functions, except
those that still use legacy macros.

v2: don't forget about function descriptions (Sagar)
v3: rebased
v4: rebased
v5: rebased, pulled out from the series

Signed-off-by: default avatarMichal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: default avatarSagar Arun Kamble <sagar.a.kamble@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180525121858.53928-1-michal.wajdeczko@intel.com
parent 2b5b6312

drivers/gpu/drm/i915/intel_uc.c

+64 −65
Original line number Diff line number Diff line
@@ -50,10 +50,10 @@ static int __intel_uc_reset_hw(struct drm_i915_private *dev_priv) 
	return ret;

}



static int __get_platform_enable_guc(struct drm_i915_private *dev_priv)

static int __get_platform_enable_guc(struct drm_i915_private *i915)

{

	struct intel_uc_fw *guc_fw = &dev_priv->guc.fw;

	struct intel_uc_fw *huc_fw = &dev_priv->huc.fw;

	struct intel_uc_fw *guc_fw = &i915->guc.fw;

	struct intel_uc_fw *huc_fw = &i915->huc.fw;

	int enable_guc = 0;



	/* Default is to enable GuC/HuC if we know their firmwares */
@@ -67,11 +67,11 @@ static int __get_platform_enable_guc(struct drm_i915_private *dev_priv) 
	return enable_guc;

}



static int __get_default_guc_log_level(struct drm_i915_private *dev_priv)

static int __get_default_guc_log_level(struct drm_i915_private *i915)

{

	int guc_log_level;



	if (!HAS_GUC(dev_priv) || !intel_uc_is_using_guc())

	if (!HAS_GUC(i915) || !intel_uc_is_using_guc())

		guc_log_level = GUC_LOG_LEVEL_DISABLED;

	else if (IS_ENABLED(CONFIG_DRM_I915_DEBUG) ||

		 IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM))
@@ -86,7 +86,7 @@ static int __get_default_guc_log_level(struct drm_i915_private *dev_priv) 


/**

 * sanitize_options_early - sanitize uC related modparam options

 * @dev_priv: device private

 * @i915: device private

 *

 * In case of "enable_guc" option this function will attempt to modify

 * it only if it was initially set to "auto(-1)". Default value for this
@@ -101,14 +101,14 @@ static int __get_default_guc_log_level(struct drm_i915_private *dev_priv) 
 * unless GuC is enabled on given platform and the driver is compiled with

 * debug config when this modparam will default to "enable(1..4)".

 */

static void sanitize_options_early(struct drm_i915_private *dev_priv)

static void sanitize_options_early(struct drm_i915_private *i915)

{

	struct intel_uc_fw *guc_fw = &dev_priv->guc.fw;

	struct intel_uc_fw *huc_fw = &dev_priv->huc.fw;

	struct intel_uc_fw *guc_fw = &i915->guc.fw;

	struct intel_uc_fw *huc_fw = &i915->huc.fw;



	/* A negative value means "use platform default" */

	if (i915_modparams.enable_guc < 0)

		i915_modparams.enable_guc = __get_platform_enable_guc(dev_priv);

		i915_modparams.enable_guc = __get_platform_enable_guc(i915);



	DRM_DEBUG_DRIVER("enable_guc=%d (submission:%s huc:%s)\n",

			 i915_modparams.enable_guc,
@@ -119,7 +119,7 @@ static void sanitize_options_early(struct drm_i915_private *dev_priv) 
	if (intel_uc_is_using_guc() && !intel_uc_fw_is_selected(guc_fw)) {

		DRM_WARN("Incompatible option detected: %s=%d, %s!\n",

			 "enable_guc", i915_modparams.enable_guc,

			 !HAS_GUC(dev_priv) ? "no GuC hardware" :

			 !HAS_GUC(i915) ? "no GuC hardware" :

					  "no GuC firmware");

	}
@@ -127,19 +127,19 @@ static void sanitize_options_early(struct drm_i915_private *dev_priv) 
	if (intel_uc_is_using_huc() && !intel_uc_fw_is_selected(huc_fw)) {

		DRM_WARN("Incompatible option detected: %s=%d, %s!\n",

			 "enable_guc", i915_modparams.enable_guc,

			 !HAS_HUC(dev_priv) ? "no HuC hardware" :

			 !HAS_HUC(i915) ? "no HuC hardware" :

					  "no HuC firmware");

	}



	/* A negative value means "use platform/config default" */

	if (i915_modparams.guc_log_level < 0)

		i915_modparams.guc_log_level =

			__get_default_guc_log_level(dev_priv);

			__get_default_guc_log_level(i915);



	if (i915_modparams.guc_log_level > 0 && !intel_uc_is_using_guc()) {

		DRM_WARN("Incompatible option detected: %s=%d, %s!\n",

			 "guc_log_level", i915_modparams.guc_log_level,

			 !HAS_GUC(dev_priv) ? "no GuC hardware" :

			 !HAS_GUC(i915) ? "no GuC hardware" :

					  "GuC not enabled");

		i915_modparams.guc_log_level = 0;

	}
@@ -195,15 +195,14 @@ void intel_uc_cleanup_early(struct drm_i915_private *i915) 


/**

 * intel_uc_init_mmio - setup uC MMIO access

 *

 * @dev_priv: device private

 * @i915: device private

 *

 * Setup minimal state necessary for MMIO accesses later in the

 * initialization sequence.

 */

void intel_uc_init_mmio(struct drm_i915_private *dev_priv)

void intel_uc_init_mmio(struct drm_i915_private *i915)

{

	intel_guc_init_send_regs(&dev_priv->guc);

	intel_guc_init_send_regs(&i915->guc);

}



static void guc_capture_load_err_log(struct intel_guc *guc)
@@ -225,11 +224,11 @@ static void guc_free_load_err_log(struct intel_guc *guc) 


static int guc_enable_communication(struct intel_guc *guc)

{

	struct drm_i915_private *dev_priv = guc_to_i915(guc);

	struct drm_i915_private *i915 = guc_to_i915(guc);



	gen9_enable_guc_interrupts(dev_priv);

	gen9_enable_guc_interrupts(i915);



	if (HAS_GUC_CT(dev_priv))

	if (HAS_GUC_CT(i915))

		return intel_guc_ct_enable(&guc->ct);



	guc->send = intel_guc_send_mmio;
@@ -239,23 +238,23 @@ static int guc_enable_communication(struct intel_guc *guc) 


static void guc_disable_communication(struct intel_guc *guc)

{

	struct drm_i915_private *dev_priv = guc_to_i915(guc);

	struct drm_i915_private *i915 = guc_to_i915(guc);



	if (HAS_GUC_CT(dev_priv))

	if (HAS_GUC_CT(i915))

		intel_guc_ct_disable(&guc->ct);



	gen9_disable_guc_interrupts(dev_priv);

	gen9_disable_guc_interrupts(i915);



	guc->send = intel_guc_send_nop;

	guc->handler = intel_guc_to_host_event_handler_nop;

}



int intel_uc_init_misc(struct drm_i915_private *dev_priv)

int intel_uc_init_misc(struct drm_i915_private *i915)

{

	struct intel_guc *guc = &dev_priv->guc;

	struct intel_guc *guc = &i915->guc;

	int ret;



	if (!USES_GUC(dev_priv))

	if (!USES_GUC(i915))

		return 0;



	intel_guc_init_ggtt_pin_bias(guc);
@@ -267,32 +266,32 @@ int intel_uc_init_misc(struct drm_i915_private *dev_priv) 
	return 0;

}



void intel_uc_fini_misc(struct drm_i915_private *dev_priv)

void intel_uc_fini_misc(struct drm_i915_private *i915)

{

	struct intel_guc *guc = &dev_priv->guc;

	struct intel_guc *guc = &i915->guc;



	if (!USES_GUC(dev_priv))

	if (!USES_GUC(i915))

		return;



	intel_guc_fini_wq(guc);

}



int intel_uc_init(struct drm_i915_private *dev_priv)

int intel_uc_init(struct drm_i915_private *i915)

{

	struct intel_guc *guc = &dev_priv->guc;

	struct intel_guc *guc = &i915->guc;

	int ret;



	if (!USES_GUC(dev_priv))

	if (!USES_GUC(i915))

		return 0;



	if (!HAS_GUC(dev_priv))

	if (!HAS_GUC(i915))

		return -ENODEV;



	ret = intel_guc_init(guc);

	if (ret)

		return ret;



	if (USES_GUC_SUBMISSION(dev_priv)) {

	if (USES_GUC_SUBMISSION(i915)) {

		/*

		 * This is stuff we need to have available at fw load time

		 * if we are planning to enable submission later
@@ -307,16 +306,16 @@ int intel_uc_init(struct drm_i915_private *dev_priv) 
	return 0;

}



void intel_uc_fini(struct drm_i915_private *dev_priv)

void intel_uc_fini(struct drm_i915_private *i915)

{

	struct intel_guc *guc = &dev_priv->guc;

	struct intel_guc *guc = &i915->guc;



	if (!USES_GUC(dev_priv))

	if (!USES_GUC(i915))

		return;



	GEM_BUG_ON(!HAS_GUC(dev_priv));

	GEM_BUG_ON(!HAS_GUC(i915));



	if (USES_GUC_SUBMISSION(dev_priv))

	if (USES_GUC_SUBMISSION(i915))

		intel_guc_submission_fini(guc);



	intel_guc_fini(guc);
@@ -340,22 +339,22 @@ void intel_uc_sanitize(struct drm_i915_private *i915) 
	__intel_uc_reset_hw(i915);

}



int intel_uc_init_hw(struct drm_i915_private *dev_priv)

int intel_uc_init_hw(struct drm_i915_private *i915)

{

	struct intel_guc *guc = &dev_priv->guc;

	struct intel_huc *huc = &dev_priv->huc;

	struct intel_guc *guc = &i915->guc;

	struct intel_huc *huc = &i915->huc;

	int ret, attempts;



	if (!USES_GUC(dev_priv))

	if (!USES_GUC(i915))

		return 0;



	GEM_BUG_ON(!HAS_GUC(dev_priv));

	GEM_BUG_ON(!HAS_GUC(i915));



	gen9_reset_guc_interrupts(dev_priv);

	gen9_reset_guc_interrupts(i915);



	/* WaEnableuKernelHeaderValidFix:skl */

	/* WaEnableGuCBootHashCheckNotSet:skl,bxt,kbl */

	if (IS_GEN9(dev_priv))

	if (IS_GEN9(i915))

		attempts = 3;

	else

		attempts = 1;
@@ -365,11 +364,11 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) 
		 * Always reset the GuC just before (re)loading, so

		 * that the state and timing are fairly predictable

		 */

		ret = __intel_uc_reset_hw(dev_priv);

		ret = __intel_uc_reset_hw(i915);

		if (ret)

			goto err_out;



		if (USES_HUC(dev_priv)) {

		if (USES_HUC(i915)) {

			ret = intel_huc_fw_upload(huc);

			if (ret)

				goto err_out;
@@ -392,24 +391,24 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) 
	if (ret)

		goto err_log_capture;



	if (USES_HUC(dev_priv)) {

	if (USES_HUC(i915)) {

		ret = intel_huc_auth(huc);

		if (ret)

			goto err_communication;

	}



	if (USES_GUC_SUBMISSION(dev_priv)) {

	if (USES_GUC_SUBMISSION(i915)) {

		ret = intel_guc_submission_enable(guc);

		if (ret)

			goto err_communication;

	}



	dev_info(dev_priv->drm.dev, "GuC firmware version %u.%u\n",

	dev_info(i915->drm.dev, "GuC firmware version %u.%u\n",

		 guc->fw.major_ver_found, guc->fw.minor_ver_found);

	dev_info(dev_priv->drm.dev, "GuC submission %s\n",

		 enableddisabled(USES_GUC_SUBMISSION(dev_priv)));

	dev_info(dev_priv->drm.dev, "HuC %s\n",

		 enableddisabled(USES_HUC(dev_priv)));

	dev_info(i915->drm.dev, "GuC submission %s\n",

		 enableddisabled(USES_GUC_SUBMISSION(i915)));

	dev_info(i915->drm.dev, "HuC %s\n",

		 enableddisabled(USES_HUC(i915)));



	return 0;
@@ -428,20 +427,20 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv) 
	if (GEM_WARN_ON(ret == -EIO))

		ret = -EINVAL;



	dev_err(dev_priv->drm.dev, "GuC initialization failed %d\n", ret);

	dev_err(i915->drm.dev, "GuC initialization failed %d\n", ret);

	return ret;

}



void intel_uc_fini_hw(struct drm_i915_private *dev_priv)

void intel_uc_fini_hw(struct drm_i915_private *i915)

{

	struct intel_guc *guc = &dev_priv->guc;

	struct intel_guc *guc = &i915->guc;



	if (!USES_GUC(dev_priv))

	if (!USES_GUC(i915))

		return;



	GEM_BUG_ON(!HAS_GUC(dev_priv));

	GEM_BUG_ON(!HAS_GUC(i915));



	if (USES_GUC_SUBMISSION(dev_priv))

	if (USES_GUC_SUBMISSION(i915))

		intel_guc_submission_disable(guc);



	guc_disable_communication(guc);