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Commit 2b5b6312 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Simplify ilk-ivb underrun suppression 



Let's suppress the underruns around every modeset sequence instead
of trying to avoid it. Planes are disabled at this point anyway so
we don't really gain anything from keeping the underrun reporting
enabled. Also for PCH ports we already suppress all underruns here
anyway so trying avoid it for the CPU eDP doesn't seem all that
important.

Maybe this gets rid of some lingering spurious underruns?

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180524190406.2973-2-ville.syrjala@linux.intel.com


Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent ca3b3fa3

drivers/gpu/drm/i915/intel_display.c

+4 −8
Original line number Diff line number Diff line
@@ -5470,9 +5470,7 @@ static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config, 
	 *

	 * Spurious PCH underruns also occur during PCH enabling.

	 */

	if (intel_crtc->config->has_pch_encoder || IS_GEN5(dev_priv))

	intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);

	if (intel_crtc->config->has_pch_encoder)

	intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false);



	if (intel_crtc->config->has_pch_encoder)
@@ -5717,10 +5715,8 @@ static void ironlake_crtc_disable(struct intel_crtc_state *old_crtc_state, 
	 * pipe is already disabled, but FDI RX/TX is still enabled.

	 * Happens at least with VGA+HDMI cloning. Suppress them.

	 */

	if (intel_crtc->config->has_pch_encoder) {

	intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);

	intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false);

	}



	intel_encoders_disable(crtc, old_crtc_state, old_state);