Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 8bafb83e authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'stmmac-DWMAC5' 



Jose Abreu says:

====================
Fix TX Timeout and implement Safety Features

Fix the TX Timeout handler to correctly reconfigure the whole system and
start implementing features for DWMAC5 cores, specifically the Safety
Features.

Changes since v1:
	- Display error stats in ethtool
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 02281a35 8bf993a5

drivers/net/ethernet/stmicro/stmmac/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -4,7 +4,7 @@ stmmac-objs:= stmmac_main.o stmmac_ethtool.o stmmac_mdio.o ring_mode.o \ 
	      chain_mode.o dwmac_lib.o dwmac1000_core.o dwmac1000_dma.o	\

	      dwmac100_core.o dwmac100_dma.o enh_desc.o norm_desc.o	\

	      mmc_core.o stmmac_hwtstamp.o stmmac_ptp.o dwmac4_descs.o	\

	      dwmac4_dma.o dwmac4_lib.o dwmac4_core.o $(stmmac-y)

	      dwmac4_dma.o dwmac4_lib.o dwmac4_core.o dwmac5.o $(stmmac-y)



# Ordering matters. Generic driver must be last.

obj-$(CONFIG_STMMAC_PLATFORM)	+= stmmac-platform.o

drivers/net/ethernet/stmicro/stmmac/common.h

+22 −0
Original line number Diff line number Diff line
@@ -38,6 +38,8 @@ 
#define	DWMAC_CORE_3_40	0x34

#define	DWMAC_CORE_3_50	0x35

#define	DWMAC_CORE_4_00	0x40

#define DWMAC_CORE_5_00 0x50

#define DWMAC_CORE_5_10 0x51

#define STMMAC_CHAN0	0	/* Always supported and default for all chips */



/* These need to be power of two, and >= 4 */
@@ -174,6 +176,17 @@ struct stmmac_extra_stats { 
	unsigned long tx_tso_nfrags;

};



/* Safety Feature statistics exposed by ethtool */

struct stmmac_safety_stats {

	unsigned long mac_errors[32];

	unsigned long mtl_errors[32];

	unsigned long dma_errors[32];

};



/* Number of fields in Safety Stats */

#define STMMAC_SAFETY_FEAT_SIZE	\

	(sizeof(struct stmmac_safety_stats) / sizeof(unsigned long))



/* CSR Frequency Access Defines*/

#define CSR_F_35M	35000000

#define CSR_F_60M	60000000
@@ -336,6 +349,8 @@ struct dma_features { 
	/* TX and RX FIFO sizes */

	unsigned int tx_fifo_size;

	unsigned int rx_fifo_size;

	/* Automotive Safety Package */

	unsigned int asp;

};



/* GMAC TX FIFO is 8K, Rx FIFO is 16K */
@@ -532,6 +547,13 @@ struct stmmac_ops { 
			     bool loopback);

	void (*pcs_rane)(void __iomem *ioaddr, bool restart);

	void (*pcs_get_adv_lp)(void __iomem *ioaddr, struct rgmii_adv *adv);

	/* Safety Features */

	int (*safety_feat_config)(void __iomem *ioaddr, unsigned int asp);

	bool (*safety_feat_irq_status)(struct net_device *ndev,

			void __iomem *ioaddr, unsigned int asp,

			struct stmmac_safety_stats *stats);

	const char *(*safety_feat_dump)(struct stmmac_safety_stats *stats,

			int index, unsigned long *count);

};



/* PTP and HW Timer helpers */

drivers/net/ethernet/stmicro/stmmac/dwmac4.h

+4 −0
Original line number Diff line number Diff line
@@ -39,6 +39,7 @@ 
#define GMAC_HW_FEATURE0		0x0000011c

#define GMAC_HW_FEATURE1		0x00000120

#define GMAC_HW_FEATURE2		0x00000124

#define GMAC_HW_FEATURE3		0x00000128

#define GMAC_MDIO_ADDR			0x00000200

#define GMAC_MDIO_DATA			0x00000204

#define GMAC_ADDR_HIGH(reg)		(0x300 + reg * 8)
@@ -192,6 +193,9 @@ enum power_event { 
#define GMAC_HW_FEAT_TXQCNT		GENMASK(9, 6)

#define GMAC_HW_FEAT_RXQCNT		GENMASK(3, 0)



/* MAC HW features3 bitmap */

#define GMAC_HW_FEAT_ASP		GENMASK(29, 28)



/* MAC HW ADDR regs */

#define GMAC_HI_DCS			GENMASK(18, 16)

#define GMAC_HI_DCS_SHIFT		16

drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c

+38 −1
Original line number Diff line number Diff line
@@ -20,6 +20,7 @@ 
#include <net/dsa.h>

#include "stmmac_pcs.h"

#include "dwmac4.h"

#include "dwmac5.h"



static void dwmac4_core_init(struct mac_device_info *hw,

			     struct net_device *dev)
@@ -768,6 +769,40 @@ static const struct stmmac_ops dwmac410_ops = { 
	.set_filter = dwmac4_set_filter,

};



static const struct stmmac_ops dwmac510_ops = {

	.core_init = dwmac4_core_init,

	.set_mac = stmmac_dwmac4_set_mac,

	.rx_ipc = dwmac4_rx_ipc_enable,

	.rx_queue_enable = dwmac4_rx_queue_enable,

	.rx_queue_prio = dwmac4_rx_queue_priority,

	.tx_queue_prio = dwmac4_tx_queue_priority,

	.rx_queue_routing = dwmac4_rx_queue_routing,

	.prog_mtl_rx_algorithms = dwmac4_prog_mtl_rx_algorithms,

	.prog_mtl_tx_algorithms = dwmac4_prog_mtl_tx_algorithms,

	.set_mtl_tx_queue_weight = dwmac4_set_mtl_tx_queue_weight,

	.map_mtl_to_dma = dwmac4_map_mtl_dma,

	.config_cbs = dwmac4_config_cbs,

	.dump_regs = dwmac4_dump_regs,

	.host_irq_status = dwmac4_irq_status,

	.host_mtl_irq_status = dwmac4_irq_mtl_status,

	.flow_ctrl = dwmac4_flow_ctrl,

	.pmt = dwmac4_pmt,

	.set_umac_addr = dwmac4_set_umac_addr,

	.get_umac_addr = dwmac4_get_umac_addr,

	.set_eee_mode = dwmac4_set_eee_mode,

	.reset_eee_mode = dwmac4_reset_eee_mode,

	.set_eee_timer = dwmac4_set_eee_timer,

	.set_eee_pls = dwmac4_set_eee_pls,

	.pcs_ctrl_ane = dwmac4_ctrl_ane,

	.pcs_rane = dwmac4_rane,

	.pcs_get_adv_lp = dwmac4_get_adv_lp,

	.debug = dwmac4_debug,

	.set_filter = dwmac4_set_filter,

	.safety_feat_config = dwmac5_safety_feat_config,

	.safety_feat_irq_status = dwmac5_safety_feat_irq_status,

	.safety_feat_dump = dwmac5_safety_feat_dump,

};



struct mac_device_info *dwmac4_setup(void __iomem *ioaddr, int mcbins,

				     int perfect_uc_entries, int *synopsys_id)

{
@@ -808,7 +843,9 @@ struct mac_device_info *dwmac4_setup(void __iomem *ioaddr, int mcbins, 
	else

		mac->dma = &dwmac4_dma_ops;



	if (*synopsys_id >= DWMAC_CORE_4_00)

	if (*synopsys_id >= DWMAC_CORE_5_10)

		mac->mac = &dwmac510_ops;

	else if (*synopsys_id >= DWMAC_CORE_4_00)

		mac->mac = &dwmac410_ops;

	else

		mac->mac = &dwmac4_ops;

drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c

+6 −0
Original line number Diff line number Diff line
@@ -373,6 +373,12 @@ static void dwmac4_get_hw_feature(void __iomem *ioaddr, 


	/* IEEE 1588-2002 */

	dma_cap->time_stamp = 0;



	/* MAC HW feature3 */

	hw_cap = readl(ioaddr + GMAC_HW_FEATURE3);



	/* 5.10 Features */

	dma_cap->asp = (hw_cap & GMAC_HW_FEAT_ASP) >> 28;

}



/* Enable/disable TSO feature and set MSS */