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Commit 82e56393 authored by Paweł Jarosz's avatar Paweł Jarosz Committed by Heiko Stuebner
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clk: rockchip: add 400MHz to rk3066 clock rates table 



We need this to init PLL_CPLL to 400MHz at boot.

Signed-off-by: default avatarPaweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 1dfbec39
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