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Commit 7b39a0b7 authored Dec 05, 2013 by Ville Syrjälä Committed by Daniel Vetter Dec 17, 2013

drm/i915: Avoid computing invalid WM levels when sprites/scaling is enabled



On ILK/SNB only LP0/1 watermarks can be enabled when sprites are
enabled, and on ILK/SNB/IVB sprite scaling is limited to LP0 only.

So we can avoid computing the extra levels we're never going to use.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

parent a68d68ee

drivers/gpu/drm/i915/intel_pm.c

+8 −0

Original line number	Diff line number	Diff line
		@@ -2643,6 +2643,14 @@ static bool intel_compute_pipe_wm(struct drm_crtc *crtc,
		/* LP0 watermarks always use 1/2 DDB partitioning */
		ilk_compute_wm_maximums(dev, 0, &config, INTEL_DDB_PART_1_2, &max);

		/* ILK/SNB: LP2+ watermarks only w/o sprites */
		if (INTEL_INFO(dev)->gen <= 6 && params->spr.enabled)
		max_level = 1;

		/* ILK/SNB/IVB: LP1+ watermarks only w/o scaling */
		if (params->spr.scaled)
		max_level = 0;

		for (level = 0; level <= max_level; level++)
		ilk_compute_wm_level(dev_priv, level, params,
		&pipe_wm->wm[level]);