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Commit 65d5b109 authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Merge branches 'pci/host-generic', 'pci/host-imx6', 'pci/host-iproc' and 'pci/host-rcar' into next 

* pci/host-generic:
  PCI: generic,versatile: Remove unused pci_sys_data structures

* pci/host-imx6:
  PCI: imx6: Add support for active-low reset GPIO
  PCI: imx6: Use gpio_set_value_cansleep()

* pci/host-iproc:
  PCI: iproc: Add iProc PCIe MSI support
  PCI: iproc: Add iProc PCIe MSI device tree binding
  PCI: iproc: Add PAXC interface support
  PCI: iproc: Update iProc PCIe device tree binding
  PCI: iproc: Do not use 0x in front of %pap
  PCI: iproc: Hide CONFIG_PCIE_IPROC

* pci/host-rcar:
  PCI: rcar: Add gen2 fallback compatibility string for pcie-rcar
  PCI: rcar: Add gen2 fallback compatibility string for pci-rcar-gen2
  PCI: rcar: Add support for R-Car H3 to pcie-rcar
  Revert "PCI: rcar: Build pcie-rcar.c only on ARM"
  PCI: rcar: Convert to DT resource parsing API
  PCI: rcar: Allow DT to override default window settings
parents 800e07b6 a574795b 5c5fb40d 3bc2b234 a37b3eaf

Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt

+39 −1
Original line number Diff line number Diff line 
* Broadcom iProc PCIe controller with the platform bus interface



Required properties:

- compatible: Must be "brcm,iproc-pcie"

- compatible: Must be "brcm,iproc-pcie" for PAXB, or "brcm,iproc-pcie-paxc"

  for PAXC.  PAXB-based root complex is used for external endpoint devices.

  PAXC-based root complex is connected to emulated endpoint devices

  internal to the ASIC

- reg: base address and length of the PCIe controller I/O register space

- #interrupt-cells: set to <1>

- interrupt-map-mask and interrupt-map, standard PCI properties to define the
@@ -32,6 +35,28 @@ Optional: 
- brcm,pcie-ob-oarr-size: Some iProc SoCs need the OARR size bit to be set to

increase the outbound window size



MSI support (optional):



For older platforms without MSI integrated in the GIC, iProc PCIe core provides

an event queue based MSI support.  The iProc MSI uses host memories to store

MSI posted writes in the event queues



- msi-parent: Link to the device node of the MSI controller.  On newer iProc

platforms, the MSI controller may be gicv2m or gicv3-its.  On older iProc

platforms without MSI support in its interrupt controller, one may use the

event queue based MSI support integrated within the iProc PCIe core.



When the iProc event queue based MSI is used, one needs to define the

following properties in the MSI device node:

- compatible: Must be "brcm,iproc-msi"

- msi-controller: claims itself as an MSI controller

- interrupt-parent: Link to its parent interrupt device

- interrupts: List of interrupt IDs from its parent interrupt device



Optional properties:

- brcm,pcie-msi-inten: Needs to be present for some older iProc platforms that

require the interrupt enable registers to be set explicitly to enable MSI



Example:

	pcie0: pcie@18012000 {

		compatible = "brcm,iproc-pcie";
@@ -58,6 +83,19 @@ Example: 
		brcm,pcie-ob-oarr-size;

		brcm,pcie-ob-axi-offset = <0x00000000>;

		brcm,pcie-ob-window-size = <256>;



		msi-parent = <&msi0>;



		/* iProc event queue based MSI */

		msi0: msi@18012000 {

			compatible = "brcm,iproc-msi";

			msi-controller;

			interrupt-parent = <&gic>;

			interrupts = <GIC_SPI 96 IRQ_TYPE_NONE>,

				     <GIC_SPI 97 IRQ_TYPE_NONE>,

				     <GIC_SPI 98 IRQ_TYPE_NONE>,

				     <GIC_SPI 99 IRQ_TYPE_NONE>,

		};

	};



	pcie1: pcie@18013000 {

Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt

+15 −2
Original line number Diff line number Diff line
@@ -8,7 +8,14 @@ OHCI and EHCI controllers. 
Required properties:

- compatible: "renesas,pci-r8a7790" for the R8A7790 SoC;

	      "renesas,pci-r8a7791" for the R8A7791 SoC;

	      "renesas,pci-r8a7794" for the R8A7794 SoC.

	      "renesas,pci-r8a7794" for the R8A7794 SoC;

	      "renesas,pci-rcar-gen2" for a generic R-Car Gen2 compatible device





	      When compatible with the generic version, nodes must list the

	      SoC-specific version corresponding to the platform first

	      followed by the generic version.



- reg:	A list of physical regions to access the device: the first is

	the operational registers for the OHCI/EHCI controllers and the

	second is for the bridge configuration and control registers.
@@ -24,10 +31,15 @@ Required properties: 
- interrupt-map-mask: standard property that helps to define the interrupt

  mapping.



Optional properties:

- dma-ranges: a single range for the inbound memory region. If not supplied,

  defaults to 1GiB at 0x40000000. Note there are hardware restrictions on the

  allowed combinations of address and size.



Example SoC configuration:



	pci0: pci@ee090000  {

		compatible = "renesas,pci-r8a7790";

		compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";

		clocks = <&mstp7_clks R8A7790_CLK_EHCI>;

		reg = <0x0 0xee090000 0x0 0xc00>,

		      <0x0 0xee080000 0x0 0x1100>;
@@ -38,6 +50,7 @@ Example SoC configuration: 
		#address-cells = <3>;

		#size-cells = <2>;

		#interrupt-cells = <1>;

		dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;

		interrupt-map-mask = <0xff00 0 0 0x7>;

		interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH

				 0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH

Documentation/devicetree/bindings/pci/rcar-pci.txt

+11 −3
Original line number Diff line number Diff line 
* Renesas RCar PCIe interface



Required properties:

- compatible: should contain one of the following

	"renesas,pcie-r8a7779", "renesas,pcie-r8a7790", "renesas,pcie-r8a7791"

compatible: "renesas,pcie-r8a7779" for the R8A7779 SoC;

	    "renesas,pcie-r8a7790" for the R8A7790 SoC;

	    "renesas,pcie-r8a7791" for the R8A7791 SoC;

	    "renesas,pcie-r8a7795" for the R8A7795 SoC;

	    "renesas,pcie-rcar-gen2" for a generic R-Car Gen2 compatible device.



	    When compatible with the generic version, nodes must list the

	    SoC-specific version corresponding to the platform first

	    followed by the generic version.



- reg: base address and length of the pcie controller registers.

- #address-cells: set to <3>

- #size-cells: set to <2>
@@ -25,7 +33,7 @@ Example: 
SoC specific DT Entry:



	pcie: pcie@fe000000 {

		compatible = "renesas,pcie-r8a7791";

		compatible = "renesas,pcie-r8a7791", "renesas,pcie-rcar-gen2";

		reg = <0 0xfe000000 0 0x80000>;

		#address-cells = <3>;

		#size-cells = <2>;

drivers/pci/host/Kconfig

+14 −7
Original line number Diff line number Diff line
@@ -48,8 +48,7 @@ config PCI_RCAR_GEN2 


config PCI_RCAR_GEN2_PCIE

	bool "Renesas R-Car PCIe controller"

	depends on ARM

	depends on ARCH_SHMOBILE || COMPILE_TEST

	depends on ARCH_SHMOBILE || (ARM && COMPILE_TEST)

	help

	  Say Y here if you want PCIe controller support on R-Car Gen2 SoCs.
@@ -118,13 +117,11 @@ config PCI_VERSATILE 
	depends on ARCH_VERSATILE



config PCIE_IPROC

	tristate "Broadcom iProc PCIe controller"

	depends on OF && (ARM || ARM64)

	default n

	tristate

	help

	  This enables the iProc PCIe core controller support for Broadcom's

	  iProc family of SoCs. An appropriate bus interface driver also needs

	  to be enabled

	  iProc family of SoCs. An appropriate bus interface driver needs

	  to be enabled to select this.



config PCIE_IPROC_PLATFORM

	tristate "Broadcom iProc PCIe platform bus driver"
@@ -147,6 +144,16 @@ config PCIE_IPROC_BCMA 
	  Say Y here if you want to use the Broadcom iProc PCIe controller

	  through the BCMA bus interface



config PCIE_IPROC_MSI

	bool "Broadcom iProc PCIe MSI support"

	depends on PCIE_IPROC_PLATFORM || PCIE_IPROC_BCMA

	depends on PCI_MSI

	select PCI_MSI_IRQ_DOMAIN

	default ARCH_BCM_IPROC

	help

	  Say Y here if you want to enable MSI support for Broadcom's iProc

	  PCIe controller



config PCIE_ALTERA

	bool "Altera PCIe controller"

	depends on ARM || NIOS2

drivers/pci/host/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ obj-$(CONFIG_PCI_XGENE_MSI) += pci-xgene-msi.o 
obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o

obj-$(CONFIG_PCI_VERSATILE) += pci-versatile.o

obj-$(CONFIG_PCIE_IPROC) += pcie-iproc.o

obj-$(CONFIG_PCIE_IPROC_MSI) += pcie-iproc-msi.o

obj-$(CONFIG_PCIE_IPROC_PLATFORM) += pcie-iproc-platform.o

obj-$(CONFIG_PCIE_IPROC_BCMA) += pcie-iproc-bcma.o

obj-$(CONFIG_PCIE_ALTERA) += pcie-altera.o