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Commit 800e07b6 authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Merge branches 'pci/aspm', 'pci/hotplug', 'pci/misc' and 'pci/msi' into next 

* pci/aspm:
  PCI/ASPM: Make sysfs link_state_store() consistent with link_state_show()

* pci/hotplug:
  PCI: pciehp: Always protect pciehp_disable_slot() with hotplug mutex

* pci/misc:
  x86/PCI: Simplify pci_bios_{read,write}
  PCI: Simplify config space size computation
  PCI: Limit config space size for Netronome NFP6000 family
  PCI: Add Netronome vendor and device IDs
  PCI: Support PCIe devices with short cfg_size
  x86/PCI: Clarify AMD Fam10h config access restrictions comment
  PCI: Print warnings for all invalid expansion ROM headers
  PCI: Check for PCI_HEADER_TYPE_BRIDGE equality, not bitmask

* pci/msi:
  PCI/MSI: Remove empty pci_msi_init_pci_dev()
  PCI/MSI: Initialize MSI capability for all architectures
parents 1ec21837 57d86a04 64609eaa 96ae6469 128fc68c

arch/powerpc/kernel/eeh_driver.c

+1 −1
Original line number Diff line number Diff line
@@ -400,7 +400,7 @@ static void *eeh_rmv_device(void *data, void *userdata) 
	 * support EEH. So we just care about PCI devices for

	 * simplicity here.

	 */

	if (!dev || (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE))

	if (!dev || (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE))

		return NULL;



	/*

arch/powerpc/kernel/pci_of_scan.c

+0 −3
Original line number Diff line number Diff line
@@ -187,9 +187,6 @@ struct pci_dev *of_create_pci_dev(struct device_node *node, 


	pci_device_add(dev, bus);



	/* Setup MSI caps & disable MSI/MSI-X interrupts */

	pci_msi_setup_pci_dev(dev);



	return dev;

}

EXPORT_SYMBOL(of_create_pci_dev);

arch/x86/include/asm/pci_x86.h

+5 −5
Original line number Diff line number Diff line
@@ -151,11 +151,11 @@ extern struct list_head pci_mmcfg_list; 
#define PCI_MMCFG_BUS_OFFSET(bus)      ((bus) << 20)



/*

 * AMD Fam10h CPUs are buggy, and cannot access MMIO config space

 * on their northbrige except through the * %eax register. As such, you MUST

 * NOT use normal IOMEM accesses, you need to only use the magic mmio-config

 * accessor functions.

 * In fact just use pci_config_*, nothing else please.

 * On AMD Fam10h CPUs, all PCI MMIO configuration space accesses must use

 * %eax.  No other source or target registers may be used.  The following

 * mmio_config_* accessors enforce this.  See "BIOS and Kernel Developer's

 * Guide (BKDG) For AMD Family 10h Processors", rev. 3.48, sec 2.11.1,

 * "MMIO Configuration Coding Requirements".

 */

static inline unsigned char mmio_config_readb(void __iomem *pos)

{

arch/x86/pci/pcbios.c

+38 −70
Original line number Diff line number Diff line
@@ -180,6 +180,7 @@ static int pci_bios_read(unsigned int seg, unsigned int bus, 
	unsigned long result = 0;

	unsigned long flags;

	unsigned long bx = (bus << 8) | devfn;

	u16 number = 0, mask = 0;



	WARN_ON(seg);

	if (!value || (bus > 255) || (devfn > 255) || (reg > 255))
@@ -189,52 +190,34 @@ static int pci_bios_read(unsigned int seg, unsigned int bus, 


	switch (len) {

	case 1:

		__asm__("lcall *(%%esi); cld\n\t"

			"jc 1f\n\t"

			"xor %%ah, %%ah\n"

			"1:"

			: "=c" (*value),

			  "=a" (result)

			: "1" (PCIBIOS_READ_CONFIG_BYTE),

			  "b" (bx),

			  "D" ((long)reg),

			  "S" (&pci_indirect));

		/*

		 * Zero-extend the result beyond 8 bits, do not trust the

		 * BIOS having done it:

		 */

		*value &= 0xff;

		number = PCIBIOS_READ_CONFIG_BYTE;

		mask = 0xff;

		break;

	case 2:

		number = PCIBIOS_READ_CONFIG_WORD;

		mask = 0xffff;

		break;

	case 4:

		number = PCIBIOS_READ_CONFIG_DWORD;

		break;

	}



	__asm__("lcall *(%%esi); cld\n\t"

		"jc 1f\n\t"

		"xor %%ah, %%ah\n"

		"1:"

		: "=c" (*value),

		  "=a" (result)

			: "1" (PCIBIOS_READ_CONFIG_WORD),

		: "1" (number),

		  "b" (bx),

		  "D" ((long)reg),

		  "S" (&pci_indirect));

	/*

		 * Zero-extend the result beyond 16 bits, do not trust the

	 * Zero-extend the result beyond 8 or 16 bits, do not trust the

	 * BIOS having done it:

	 */

		*value &= 0xffff;

		break;

	case 4:

		__asm__("lcall *(%%esi); cld\n\t"

			"jc 1f\n\t"

			"xor %%ah, %%ah\n"

			"1:"

			: "=c" (*value),

			  "=a" (result)

			: "1" (PCIBIOS_READ_CONFIG_DWORD),

			  "b" (bx),

			  "D" ((long)reg),

			  "S" (&pci_indirect));

		break;

	}

	if (mask)

		*value &= mask;



	raw_spin_unlock_irqrestore(&pci_config_lock, flags);
@@ -247,6 +230,7 @@ static int pci_bios_write(unsigned int seg, unsigned int bus, 
	unsigned long result = 0;

	unsigned long flags;

	unsigned long bx = (bus << 8) | devfn;

	u16 number = 0;



	WARN_ON(seg);

	if ((bus > 255) || (devfn > 255) || (reg > 255))
@@ -256,42 +240,26 @@ static int pci_bios_write(unsigned int seg, unsigned int bus, 


	switch (len) {

	case 1:

		__asm__("lcall *(%%esi); cld\n\t"

			"jc 1f\n\t"

			"xor %%ah, %%ah\n"

			"1:"

			: "=a" (result)

			: "0" (PCIBIOS_WRITE_CONFIG_BYTE),

			  "c" (value),

			  "b" (bx),

			  "D" ((long)reg),

			  "S" (&pci_indirect));

		number = PCIBIOS_WRITE_CONFIG_BYTE;

		break;

	case 2:

		__asm__("lcall *(%%esi); cld\n\t"

			"jc 1f\n\t"

			"xor %%ah, %%ah\n"

			"1:"

			: "=a" (result)

			: "0" (PCIBIOS_WRITE_CONFIG_WORD),

			  "c" (value),

			  "b" (bx),

			  "D" ((long)reg),

			  "S" (&pci_indirect));

		number = PCIBIOS_WRITE_CONFIG_WORD;

		break;

	case 4:

		number = PCIBIOS_WRITE_CONFIG_DWORD;

		break;

	}



	__asm__("lcall *(%%esi); cld\n\t"

		"jc 1f\n\t"

		"xor %%ah, %%ah\n"

		"1:"

		: "=a" (result)

			: "0" (PCIBIOS_WRITE_CONFIG_DWORD),

		: "0" (number),

		  "c" (value),

		  "b" (bx),

		  "D" ((long)reg),

		  "S" (&pci_indirect));

		break;

	}



	raw_spin_unlock_irqrestore(&pci_config_lock, flags);

drivers/pci/hotplug/ibmphp_pci.c

+1 −1
Original line number Diff line number Diff line
@@ -1119,7 +1119,7 @@ static struct res_needed *scan_behind_bridge (struct pci_func *func, u8 busno) 
				pci_bus_read_config_dword (ibmphp_pci_bus, devfn, PCI_CLASS_REVISION, &class);



				debug ("hdr_type behind the bridge is %x\n", hdr_type);

				if (hdr_type & PCI_HEADER_TYPE_BRIDGE) {

				if ((hdr_type & 0x7f) == PCI_HEADER_TYPE_BRIDGE) {

					err ("embedded bridges not supported for hot-plugging.\n");

					amount->not_correct = 1;

					return amount;