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Commit 65153846 authored by Andy Yan's avatar Andy Yan Committed by Cyrille Pitchen
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mtd: spi-nor: add support for GD25Q256



Add support for GD25Q256, a 32MiB SPI Nor flash
from GigaDevice.

Signed-off-by: default avatarAndy Yan <andy.yan@rock-chips.com>
Signed-off-by: default avatarCyrille Pitchen <cyrille.pitchen@wedev4u.fr>
parent e2707285
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+8 −0
Original line number Diff line number Diff line
@@ -872,6 +872,8 @@ static int spi_nor_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len)
	return ret;
}

static int macronix_quad_enable(struct spi_nor *nor);

/* Used when the "_ext_id" is two bytes at most */
#define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags)	\
		.id = {							\
@@ -999,6 +1001,12 @@ static const struct flash_info spi_nor_ids[] = {
			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
	},
	{
		"gd25q256", INFO(0xc84019, 0, 64 * 1024, 512,
			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
			SPI_NOR_4B_OPCODES | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
			.quad_enable = macronix_quad_enable,
	},

	/* Intel/Numonyx -- xxxs33b */
	{ "160s33b",  INFO(0x898911, 0, 64 * 1024,  32, 0) },