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Commit 62f0ace5 authored by Daniel Vetter's avatar Daniel Vetter
Browse files

drm/i915: Update comments around base bpp 



Forgot to do that in

commit d328c9d7
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Fri Apr 10 16:22:37 2015 +0200

    drm/i915: Select starting pipe bpp irrespective or the primary plane

and it's confusing. Fix it.

Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Acked-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@intel.com>
parent e93c28f3

drivers/gpu/drm/i915/intel_display.c

+1 −5
Original line number Original line Diff line number Diff line
@@ -12102,10 +12102,6 @@ intel_modeset_pipe_config(struct drm_crtc *crtc, 
	      (DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_NVSYNC)))

	      (DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_NVSYNC)))

		pipe_config->base.adjusted_mode.flags |= DRM_MODE_FLAG_NVSYNC;

		pipe_config->base.adjusted_mode.flags |= DRM_MODE_FLAG_NVSYNC;





	/* Compute a starting value for pipe_config->pipe_bpp taking the source

	 * plane pixel format and any sink constraints into account. Returns the

	 * source plane bpp so that dithering can be selected on mismatches

	 * after encoders and crtc also have had their say. */

	base_bpp = compute_baseline_pipe_bpp(to_intel_crtc(crtc),

	base_bpp = compute_baseline_pipe_bpp(to_intel_crtc(crtc),

					     pipe_config);

					     pipe_config);

	if (base_bpp < 0)

	if (base_bpp < 0)
@@ -12174,7 +12170,7 @@ intel_modeset_pipe_config(struct drm_crtc *crtc, 
	/* Dithering seems to not pass-through bits correctly when it should, so

	/* Dithering seems to not pass-through bits correctly when it should, so

	 * only enable it on 6bpc panels. */

	 * only enable it on 6bpc panels. */

	pipe_config->dither = pipe_config->pipe_bpp == 6*3;

	pipe_config->dither = pipe_config->pipe_bpp == 6*3;

	DRM_DEBUG_KMS("plane bpp: %i, pipe bpp: %i, dithering: %i\n",

	DRM_DEBUG_KMS("hw max bpp: %i, pipe bpp: %i, dithering: %i\n",

		      base_bpp, pipe_config->pipe_bpp, pipe_config->dither);

		      base_bpp, pipe_config->pipe_bpp, pipe_config->dither);





fail:

fail: