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Commit e93c28f3 authored by Daniel Vetter's avatar Daniel Vetter
Browse files

Merge tag 'drm-intel-next-fixes-2015-09-02' into drm-intel-next-queued



Backmerge -fixes since there's more DDI-E related cleanups on top of
the pile of -fixes for skl that just landed for 4.3.

Conflicts:
	drivers/gpu/drm/i915/intel_display.c
	drivers/gpu/drm/i914/intel_dp.c
	drivers/gpu/drm/i915/intel_lrc.c

Conflicts are all fairly harmless adjacent line stuff.

Signed-off-by: default avatarDaniel Vetter <daniel.vetter@intel.com>
parents 85a62bf9 6fa2d197
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.get_maintainer.ignore

0 → 100644
+1 −0
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Christoph Hellwig <hch@lst.de>
+1 −0
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@@ -17,6 +17,7 @@ Aleksey Gorelov <aleksey_gorelov@phoenix.com>
Al Viro <viro@ftp.linux.org.uk>
Al Viro <viro@zenIV.linux.org.uk>
Andreas Herrmann <aherrman@de.ibm.com>
Andrey Ryabinin <ryabinin.a.a@gmail.com> <a.ryabinin@samsung.com>
Andrew Morton <akpm@linux-foundation.org>
Andrew Vasquez <andrew.vasquez@qlogic.com>
Andy Adamson <andros@citi.umich.edu>
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@@ -199,6 +199,7 @@ nodes to be present and contain the properties described below.
			    "qcom,kpss-acc-v1"
			    "qcom,kpss-acc-v2"
			    "rockchip,rk3066-smp"
			    "ste,dbx500-smp"

	- cpu-release-addr
		Usage: required for systems that have an "enable-method"
+35 −6
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@@ -30,20 +30,27 @@ Optional properties:
- panel@0: Node of panel connected to this DSI controller.
  See files in Documentation/devicetree/bindings/panel/ for each supported
  panel.
- qcom,dual-panel-mode: Boolean value indicating if the DSI controller is
- qcom,dual-dsi-mode: Boolean value indicating if the DSI controller is
  driving a panel which needs 2 DSI links.
- qcom,master-panel: Boolean value indicating if the DSI controller is driving
- qcom,master-dsi: Boolean value indicating if the DSI controller is driving
  the master link of the 2-DSI panel.
- qcom,sync-dual-panel: Boolean value indicating if the DSI controller is
- qcom,sync-dual-dsi: Boolean value indicating if the DSI controller is
  driving a 2-DSI panel whose 2 links need receive command simultaneously.
- interrupt-parent: phandle to the MDP block if the interrupt signal is routed
  through MDP block
- pinctrl-names: the pin control state names; should contain "default"
- pinctrl-0: the default pinctrl state (active)
- pinctrl-n: the "sleep" pinctrl state
- port: DSI controller output port. This contains one endpoint subnode, with its
  remote-endpoint set to the phandle of the connected panel's endpoint.
  See Documentation/devicetree/bindings/graph.txt for device graph info.

DSI PHY:
Required properties:
- compatible: Could be the following
  * "qcom,dsi-phy-28nm-hpm"
  * "qcom,dsi-phy-28nm-lp"
  * "qcom,dsi-phy-20nm"
- reg: Physical base address and length of the registers of PLL, PHY and PHY
  regulator
- reg-names: The names of register regions. The following regions are required:
@@ -59,6 +66,10 @@ Required properties:
  * "iface_clk"
- vddio-supply: phandle to vdd-io regulator device node

Optional properties:
- qcom,dsi-phy-regulator-ldo-mode: Boolean value indicating if the LDO mode PHY
  regulator is wanted.

Example:
	mdss_dsi0: qcom,mdss_dsi@fd922800 {
		compatible = "qcom,mdss-dsi-ctrl";
@@ -90,9 +101,13 @@ Example:

		qcom,dsi-phy = <&mdss_dsi_phy0>;

		qcom,dual-panel-mode;
		qcom,master-panel;
		qcom,sync-dual-panel;
		qcom,dual-dsi-mode;
		qcom,master-dsi;
		qcom,sync-dual-dsi;

		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&mdss_dsi_active>;
		pinctrl-1 = <&mdss_dsi_suspend>;

		panel: panel@0 {
			compatible = "sharp,lq101r1sx01";
@@ -101,6 +116,18 @@ Example:

			power-supply = <...>;
			backlight = <...>;

			port {
				panel_in: endpoint {
					remote-endpoint = <&dsi0_out>;
				};
			};
		};

		port {
			dsi0_out: endpoint {
				remote-endpoint = <&panel_in>;
			};
		};
	};

@@ -117,4 +144,6 @@ Example:
		clock-names = "iface_clk";
		clocks = <&mmcc MDSS_AHB_CLK>;
		vddio-supply = <&pma8084_l12>;

		qcom,dsi-phy-regulator-ldo-mode;
	};
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@@ -2,8 +2,9 @@ Qualcomm adreno/snapdragon hdmi output

Required properties:
- compatible: one of the following
   * "qcom,hdmi-tx-8994"
   * "qcom,hdmi-tx-8084"
   * "qcom,hdmi-tx-8074"
   * "qcom,hdmi-tx-8974"
   * "qcom,hdmi-tx-8660"
   * "qcom,hdmi-tx-8960"
- reg: Physical base address and length of the controller's registers
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