Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 62855bcf authored by Sergei Shtylyov's avatar Sergei Shtylyov Committed by Simon Horman
Browse files

ARM: dts: r8a7792: add VIN clocks 



Describe the VIN[0-5] clocks and their parent, ZG clock in the R8A7792
device  tree.

Signed-off-by: default avatarSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 78082700

arch/arm/boot/dts/r8a7792.dtsi

+17 −3
Original line number Diff line number Diff line
@@ -643,6 +643,13 @@ 
			clock-div = <49>;

			clock-mult = <1>;

		};

		zg_clk: zg {

			compatible = "fixed-factor-clock";

			clocks = <&cpg_clocks R8A7792_CLK_PLL1>;

			#clock-cells = <0>;

			clock-div = <5>;

			clock-mult = <1>;

		};



		/* Gate clocks */

		mstp1_clks: mstp1_clks@e6150134 {
@@ -702,10 +709,17 @@ 
			compatible = "renesas,r8a7792-mstp-clocks",

				     "renesas,cpg-mstp-clocks";

			reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;

			clocks = <&hp_clk>;

			clocks = <&zg_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>,

			         <&zg_clk>, <&zg_clk>, <&hp_clk>;

			#clock-cells = <1>;

			clock-indices = <R8A7792_CLK_ETHERAVB>;

			clock-output-names = "etheravb";

			clock-indices = <

				R8A7792_CLK_VIN5 R8A7792_CLK_VIN4

				R8A7792_CLK_VIN3 R8A7792_CLK_VIN2

				R8A7792_CLK_VIN1 R8A7792_CLK_VIN0

				R8A7792_CLK_ETHERAVB

			>;

			clock-output-names = "vin5", "vin4", "vin3", "vin2",

					     "vin1", "vin0", "etheravb";

		};

		mstp9_clks: mstp9_clks@e6150994 {

			compatible = "renesas,r8a7792-mstp-clocks",