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Commit 78082700 authored by Sergei Shtylyov's avatar Sergei Shtylyov Committed by Simon Horman
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ARM: dts: r8a7792: add I2C support 



Define the generic R8A7792 parts of the I2C[0-5] device nodes.

Signed-off-by: default avatarSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent eedee25c

arch/arm/boot/dts/r8a7792.dtsi

+82 −0
Original line number Diff line number Diff line
@@ -18,6 +18,15 @@ 
	#address-cells = <2>;

	#size-cells = <2>;



	aliases {

		i2c0 = &i2c0;

		i2c1 = &i2c1;

		i2c2 = &i2c2;

		i2c3 = &i2c3;

		i2c4 = &i2c4;

		i2c5 = &i2c5;

};



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;
@@ -468,6 +477,79 @@ 
			status = "disabled";

		};



		/* I2C doesn't need pinmux */

		i2c0: i2c@e6508000 {

			compatible = "renesas,i2c-r8a7792";

			reg = <0 0xe6508000 0 0x40>;

			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&mstp9_clks R8A7792_CLK_I2C0>;

			power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;

			i2c-scl-internal-delay-ns = <6>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		i2c1: i2c@e6518000 {

			compatible = "renesas,i2c-r8a7792";

			reg = <0 0xe6518000 0 0x40>;

			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&mstp9_clks R8A7792_CLK_I2C1>;

			power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;

			i2c-scl-internal-delay-ns = <6>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		i2c2: i2c@e6530000 {

			compatible = "renesas,i2c-r8a7792";

			reg = <0 0xe6530000 0 0x40>;

			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&mstp9_clks R8A7792_CLK_I2C2>;

			power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;

			i2c-scl-internal-delay-ns = <6>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		i2c3: i2c@e6540000 {

			compatible = "renesas,i2c-r8a7792";

			reg = <0 0xe6540000 0 0x40>;

			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&mstp9_clks R8A7792_CLK_I2C3>;

			power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;

			i2c-scl-internal-delay-ns = <6>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		i2c4: i2c@e6520000 {

			compatible = "renesas,i2c-r8a7792";

			reg = <0 0xe6520000 0 0x40>;

			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&mstp9_clks R8A7792_CLK_I2C4>;

			power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;

			i2c-scl-internal-delay-ns = <6>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		i2c5: i2c@e6528000 {

			compatible = "renesas,i2c-r8a7792";

			reg = <0 0xe6528000 0 0x40>;

			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&mstp9_clks R8A7792_CLK_I2C5>;

			power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;

			i2c-scl-internal-delay-ns = <110>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		can0: can@e6e80000 {

			compatible = "renesas,can-r8a7792",

				     "renesas,rcar-gen2-can";