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Commit 58c24b7c authored by Christian König's avatar Christian König Committed by Alex Deucher
Browse files

drm/amdgpu: remove superflous UVD encode entity 



Not sure what that was every used for, but now it is completely unused.

Reviewed-by: default avatarLeo Liu <leo.liu@amd.com>
Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Acked-by: default avatarChunming Zhou <david1.zhou@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 48412031

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h

+0 −1
Original line number Diff line number Diff line
@@ -48,7 +48,6 @@ struct amdgpu_uvd_inst { 
	struct amdgpu_ring	ring_enc[AMDGPU_MAX_UVD_ENC_RINGS];

	struct amdgpu_irq_src	irq;

	struct drm_sched_entity entity;

	struct drm_sched_entity entity_enc;

	uint32_t                srbm_soft_reset;

};

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

+0 −12
Original line number Diff line number Diff line
@@ -418,16 +418,6 @@ static int uvd_v6_0_sw_init(void *handle) 
		adev->uvd.num_enc_rings = 0;



		DRM_INFO("UVD ENC is disabled\n");

	} else {

		struct drm_sched_rq *rq;

		ring = &adev->uvd.inst->ring_enc[0];

		rq = &ring->sched.sched_rq[DRM_SCHED_PRIORITY_NORMAL];

		r = drm_sched_entity_init(&adev->uvd.inst->entity_enc,

					  &rq, 1, NULL);

		if (r) {

			DRM_ERROR("Failed setting up UVD ENC run queue.\n");

			return r;

		}

	}



	r = amdgpu_uvd_resume(adev);
@@ -463,8 +453,6 @@ static int uvd_v6_0_sw_fini(void *handle) 
		return r;



	if (uvd_v6_0_enc_support(adev)) {

		drm_sched_entity_destroy(&adev->uvd.inst->ring_enc[0].sched, &adev->uvd.inst->entity_enc);



		for (i = 0; i < adev->uvd.num_enc_rings; ++i)

			amdgpu_ring_fini(&adev->uvd.inst->ring_enc[i]);

	}

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c

+0 −14
Original line number Diff line number Diff line
@@ -389,7 +389,6 @@ static int uvd_v7_0_early_init(void *handle) 
static int uvd_v7_0_sw_init(void *handle)

{

	struct amdgpu_ring *ring;

	struct drm_sched_rq *rq;

	int i, j, r;

	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
@@ -421,17 +420,6 @@ static int uvd_v7_0_sw_init(void *handle) 
		DRM_INFO("PSP loading UVD firmware\n");

	}



	for (j = 0; j < adev->uvd.num_uvd_inst; j++) {

		ring = &adev->uvd.inst[j].ring_enc[0];

		rq = &ring->sched.sched_rq[DRM_SCHED_PRIORITY_NORMAL];

		r = drm_sched_entity_init(&adev->uvd.inst[j].entity_enc,

					  &rq, 1, NULL);

		if (r) {

			DRM_ERROR("(%d)Failed setting up UVD ENC run queue.\n", j);

			return r;

		}

	}



	r = amdgpu_uvd_resume(adev);

	if (r)

		return r;
@@ -484,8 +472,6 @@ static int uvd_v7_0_sw_fini(void *handle) 
		return r;



	for (j = 0; j < adev->uvd.num_uvd_inst; ++j) {

		drm_sched_entity_destroy(&adev->uvd.inst[j].ring_enc[0].sched, &adev->uvd.inst[j].entity_enc);



		for (i = 0; i < adev->uvd.num_enc_rings; ++i)

			amdgpu_ring_fini(&adev->uvd.inst[j].ring_enc[i]);

	}