Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 48412031 authored by Michel Dänzer's avatar Michel Dänzer Committed by Alex Deucher
Browse files

drm/amdgpu/display: Replace CONFIG_DRM_AMD_DC_DCN1_0 with CONFIG_X86 



Allowing CONFIG_DRM_AMD_DC_DCN1_0 to be disabled on X86 was an
opportunity for display with Raven Ridge accidentally not working.

Reviewed-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarMichel Dänzer <michel.daenzer@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 1ce0688f

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+1 −1
Original line number Diff line number Diff line
@@ -2200,7 +2200,7 @@ bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type) 
	case CHIP_VEGA10:

	case CHIP_VEGA12:

	case CHIP_VEGA20:

#if defined(CONFIG_DRM_AMD_DC_DCN1_0)

#ifdef CONFIG_X86

	case CHIP_RAVEN:

#endif

		return amdgpu_dc != 0;

drivers/gpu/drm/amd/display/Kconfig

+0 −8
Original line number Diff line number Diff line
@@ -9,14 +9,6 @@ config DRM_AMD_DC 
	  support for AMDGPU. This adds required support for Vega and

	  Raven ASICs.



config DRM_AMD_DC_DCN1_0

	bool "DCN 1.0 Raven family"

	depends on DRM_AMD_DC && X86

	default y

	help

	  Choose this option if you want to have

	  RV family for display engine



config DEBUG_KERNEL_DC

	bool "Enable kgdb break in DC"

	depends on DRM_AMD_DC

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

+4 −4
Original line number Diff line number Diff line
@@ -60,7 +60,7 @@ 


#include "modules/inc/mod_freesync.h"



#if defined(CONFIG_DRM_AMD_DC_DCN1_0)

#ifdef CONFIG_X86

#include "ivsrcid/irqsrcs_dcn_1_0.h"



#include "dcn/dcn_1_0_offset.h"
@@ -1192,7 +1192,7 @@ static int dce110_register_irq_handlers(struct amdgpu_device *adev) 
	return 0;

}



#if defined(CONFIG_DRM_AMD_DC_DCN1_0)

#ifdef CONFIG_X86

/* Register IRQ sources and initialize IRQ callbacks */

static int dcn10_register_irq_handlers(struct amdgpu_device *adev)

{
@@ -1526,7 +1526,7 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev) 
			goto fail;

		}

		break;

#if defined(CONFIG_DRM_AMD_DC_DCN1_0)

#ifdef CONFIG_X86

	case CHIP_RAVEN:

		if (dcn10_register_irq_handlers(dm->adev)) {

			DRM_ERROR("DM: Failed to initialize IRQ\n");
@@ -1725,7 +1725,7 @@ static int dm_early_init(void *handle) 
		adev->mode_info.num_dig = 6;

		adev->mode_info.plane_type = dm_plane_type_default;

		break;

#if defined(CONFIG_DRM_AMD_DC_DCN1_0)

#ifdef CONFIG_X86

	case CHIP_RAVEN:

		adev->mode_info.num_crtc = 4;

		adev->mode_info.num_hpd = 4;

drivers/gpu/drm/amd/display/dc/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -25,7 +25,7 @@ 


DC_LIBS = basics bios calcs dce gpio i2caux irq virtual



ifdef CONFIG_DRM_AMD_DC_DCN1_0

ifdef CONFIG_X86

DC_LIBS += dcn10 dml

endif

drivers/gpu/drm/amd/display/dc/bios/command_table_helper2.c

+1 −1
Original line number Diff line number Diff line
@@ -55,7 +55,7 @@ bool dal_bios_parser_init_cmd_tbl_helper2( 
	case DCE_VERSION_11_22:

		*h = dal_cmd_tbl_helper_dce112_get_table2();

		return true;

#if defined(CONFIG_DRM_AMD_DC_DCN1_0)

#ifdef CONFIG_X86

	case DCN_VERSION_1_0:

		*h = dal_cmd_tbl_helper_dce112_get_table2();

		return true;