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Commit 4d9b766b authored by Andy Gross's avatar Andy Gross Committed by Olof Johansson
Browse files

arm: dts: qcom: Add TCSR support for IPQ8064 



This patch adds TCSR support for use by the GSBI to automatically
configure ADM CRCI values based on the GSBI port configuration.

Signed-off-by: default avatarAndy Gross <agross@codeaurora.org>
Signed-off-by: default avatarKumar Gala <galak@codeaurora.org>
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parent 4105d9d6

arch/arm/boot/dts/qcom-ipq8064.dtsi

+14 −0
Original line number Original line Diff line number Diff line
@@ -120,6 +120,7 @@ 




		gsbi2: gsbi@12480000 {

		gsbi2: gsbi@12480000 {

			compatible = "qcom,gsbi-v1.0.0";

			compatible = "qcom,gsbi-v1.0.0";

			cell-index = <2>;

			reg = <0x12480000 0x100>;

			reg = <0x12480000 0x100>;

			clocks = <&gcc GSBI2_H_CLK>;

			clocks = <&gcc GSBI2_H_CLK>;

			clock-names = "iface";

			clock-names = "iface";
@@ -128,6 +129,8 @@ 
			ranges;

			ranges;

			status = "disabled";

			status = "disabled";





			syscon-tcsr = <&tcsr>;



			serial@12490000 {

			serial@12490000 {

				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";

				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";

				reg = <0x12490000 0x1000>,

				reg = <0x12490000 0x1000>,
@@ -155,6 +158,7 @@ 




		gsbi4: gsbi@16300000 {

		gsbi4: gsbi@16300000 {

			compatible = "qcom,gsbi-v1.0.0";

			compatible = "qcom,gsbi-v1.0.0";

			cell-index = <4>;

			reg = <0x16300000 0x100>;

			reg = <0x16300000 0x100>;

			clocks = <&gcc GSBI4_H_CLK>;

			clocks = <&gcc GSBI4_H_CLK>;

			clock-names = "iface";

			clock-names = "iface";
@@ -163,6 +167,8 @@ 
			ranges;

			ranges;

			status = "disabled";

			status = "disabled";





			syscon-tcsr = <&tcsr>;



			serial@16340000 {

			serial@16340000 {

				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";

				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";

				reg = <0x16340000 0x1000>,

				reg = <0x16340000 0x1000>,
@@ -189,6 +195,7 @@ 




		gsbi5: gsbi@1a200000 {

		gsbi5: gsbi@1a200000 {

			compatible = "qcom,gsbi-v1.0.0";

			compatible = "qcom,gsbi-v1.0.0";

			cell-index = <5>;

			reg = <0x1a200000 0x100>;

			reg = <0x1a200000 0x100>;

			clocks = <&gcc GSBI5_H_CLK>;

			clocks = <&gcc GSBI5_H_CLK>;

			clock-names = "iface";

			clock-names = "iface";
@@ -197,6 +204,8 @@ 
			ranges;

			ranges;

			status = "disabled";

			status = "disabled";





			syscon-tcsr = <&tcsr>;



			serial@1a240000 {

			serial@1a240000 {

				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";

				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";

				reg = <0x1a240000 0x1000>,

				reg = <0x1a240000 0x1000>,
@@ -279,5 +288,10 @@ 
			#clock-cells = <1>;

			#clock-cells = <1>;

			#reset-cells = <1>;

			#reset-cells = <1>;

		};

		};



		tcsr: syscon@1a400000 {

			compatible = "qcom,tcsr-ipq8064", "syscon";

			reg = <0x1a400000 0x100>;

		};

	};

	};

};
 
};