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Commit 47228ca5 authored by Brian Norris's avatar Brian Norris
Browse files

Merge tag 'spi-nor/for-4.12-v2' of git://github.com/spi-nor/linux into MTD 

From Cyrille:
"""
This pull request contains the following notable changes:
- fixes in the hisi SPI controller driver.
- fixes in the intel SPI controller driver.
- fixes in the Mediatek SPI controller driver.
- fixes to some SPI flash memories not supported the Chip Erase command.
- add support to some new memory parts (Winbond, Macronix, Micron, ESMT).
- add new driver for the STM32 QSPI controller.
"""
parents 57e363b8 8abe904d

drivers/mtd/spi-nor/Kconfig

+7 −0
Original line number Diff line number Diff line
@@ -106,4 +106,11 @@ config SPI_INTEL_SPI_PLATFORM 
	  To compile this driver as a module, choose M here: the module

	  will be called intel-spi-platform.



config SPI_STM32_QUADSPI

	tristate "STM32 Quad SPI controller"

	depends on ARCH_STM32

	help

	  This enables support for the STM32 Quad SPI controller.

	  We only connect the NOR to this controller.



endif # MTD_SPI_NOR

drivers/mtd/spi-nor/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -8,3 +8,4 @@ obj-$(CONFIG_MTD_MT81xx_NOR) += mtk-quadspi.o 
obj-$(CONFIG_SPI_NXP_SPIFI)	+= nxp-spifi.o

obj-$(CONFIG_SPI_INTEL_SPI)	+= intel-spi.o

obj-$(CONFIG_SPI_INTEL_SPI_PLATFORM)	+= intel-spi-platform.o

obj-$(CONFIG_SPI_STM32_QUADSPI)	+= stm32-quadspi.o
 
 No newline at end of file

drivers/mtd/spi-nor/hisi-sfc.c

+4 −1
Original line number Diff line number Diff line
@@ -448,8 +448,11 @@ static int hisi_spi_nor_probe(struct platform_device *pdev) 
	if (!host->buffer)

		return -ENOMEM;



	ret = clk_prepare_enable(host->clk);

	if (ret)

		return ret;



	mutex_init(&host->lock);

	clk_prepare_enable(host->clk);

	hisi_spi_nor_init(host);

	ret = hisi_spi_nor_register_all(host);

	if (ret)

drivers/mtd/spi-nor/intel-spi.c

+2 −2
Original line number Diff line number Diff line
@@ -704,7 +704,7 @@ static void intel_spi_fill_partition(struct intel_spi *ispi, 
		 * whole partition read-only to be on the safe side.

		 */

		if (intel_spi_is_protected(ispi, base, limit))

			ispi->writeable = 0;

			ispi->writeable = false;



		end = (limit << 12) + 4096;

		if (end > part->size)
@@ -728,7 +728,7 @@ struct intel_spi *intel_spi_probe(struct device *dev, 


	ispi->base = devm_ioremap_resource(dev, mem);

	if (IS_ERR(ispi->base))

		return ispi->base;

		return ERR_CAST(ispi->base);



	ispi->dev = dev;

	ispi->info = info;

drivers/mtd/spi-nor/mtk-quadspi.c

+27 −0
Original line number Diff line number Diff line
@@ -104,6 +104,8 @@ 
#define MTK_NOR_MAX_RX_TX_SHIFT		6

/* can shift up to 56 bits (7 bytes) transfer by MTK_NOR_PRG_CMD */

#define MTK_NOR_MAX_SHIFT		7

/* nor controller 4-byte address mode enable bit */

#define MTK_NOR_4B_ADDR_EN		BIT(4)



/* Helpers for accessing the program data / shift data registers */

#define MTK_NOR_PRG_REG(n)		(MTK_NOR_PRGDATA0_REG + 4 * (n))
@@ -230,10 +232,35 @@ static int mt8173_nor_write_buffer_disable(struct mt8173_nor *mt8173_nor) 
				  10000);

}



static void mt8173_nor_set_addr_width(struct mt8173_nor *mt8173_nor)

{

	u8 val;

	struct spi_nor *nor = &mt8173_nor->nor;



	val = readb(mt8173_nor->base + MTK_NOR_DUAL_REG);



	switch (nor->addr_width) {

	case 3:

		val &= ~MTK_NOR_4B_ADDR_EN;

		break;

	case 4:

		val |= MTK_NOR_4B_ADDR_EN;

		break;

	default:

		dev_warn(mt8173_nor->dev, "Unexpected address width %u.\n",

			 nor->addr_width);

		break;

	}



	writeb(val, mt8173_nor->base + MTK_NOR_DUAL_REG);

}



static void mt8173_nor_set_addr(struct mt8173_nor *mt8173_nor, u32 addr)

{

	int i;



	mt8173_nor_set_addr_width(mt8173_nor);



	for (i = 0; i < 3; i++) {

		writeb(addr & 0xff, mt8173_nor->base + MTK_NOR_RADR0_REG + i * 4);

		addr >>= 8;