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Commit 28d8c1df authored by Mohammed Shafi Shajakhan's avatar Mohammed Shafi Shajakhan Committed by John W. Linville
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ath9k_hw: extend GPIO pin select mask for rfkill 



this extends the bits for rf kill GPIO selection to [7:2] from [4:2] as
we use GPIO pin 11 as rfkill for AR9480 and also remove few unused
macros

Cc: Wilson Tsao <wtsao@qca.qualcomm.com>
Cc: "Hu, Russell" <rhu@qca.qualcomm.com>
Cc: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: default avatarMohammed Shafi Shajakhan <mohammed@qca.qualcomm.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 44b815c6

drivers/net/wireless/ath/ath9k/eeprom.h

+1 −6
Original line number Diff line number Diff line
@@ -104,16 +104,11 @@ 
#define OLC_FOR_AR9287_10_LATER (AR_SREV_9287_11_OR_LATER(ah) && \

				 ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL))



#define AR_EEPROM_RFSILENT_GPIO_SEL     0x001c

#define AR_EEPROM_RFSILENT_GPIO_SEL_S   2

#define AR_EEPROM_RFSILENT_POLARITY     0x0002

#define AR_EEPROM_RFSILENT_POLARITY_S   1



#define EEP_RFSILENT_ENABLED        0x0001

#define EEP_RFSILENT_ENABLED_S      0

#define EEP_RFSILENT_POLARITY       0x0002

#define EEP_RFSILENT_POLARITY_S     1

#define EEP_RFSILENT_GPIO_SEL       0x001c

#define EEP_RFSILENT_GPIO_SEL       (AR_SREV_9480(ah) ? 0x00fc : 0x001c)

#define EEP_RFSILENT_GPIO_SEL_S     2



#define AR5416_OPFLAGS_11A           0x01