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Commit 209b4375 authored by Michael Buesch's avatar Michael Buesch Committed by Kalle Valo
Browse files

ssb: Remove SSB_WARN_ON, SSB_BUG_ON and SSB_DEBUG



Use the standard WARN_ON instead.
If a small kernel is desired, WARN_ON can be disabled globally.

Also remove SSB_DEBUG. Besides WARN_ON it only adds a tiny debug check.
Include this check unconditionally.

Signed-off-by: default avatarMichael Buesch <m@bues.ch>
Signed-off-by: default avatarKalle Valo <kvalo@codeaurora.org>
parent b8b6069c
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+0 −1
Original line number Diff line number Diff line
@@ -66,7 +66,6 @@ CONFIG_HW_RANDOM=y
CONFIG_GPIO_SYSFS=y
CONFIG_WATCHDOG=y
CONFIG_BCM47XX_WDT=y
CONFIG_SSB_DEBUG=y
CONFIG_SSB_DRIVER_GIGE=y
CONFIG_BCMA_DRIVER_GMAC_CMN=y
CONFIG_USB=y
+0 −1
Original line number Diff line number Diff line
@@ -78,7 +78,6 @@ CONFIG_GPIO_HLWD=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_GPIO=y
# CONFIG_HWMON is not set
CONFIG_SSB_DEBUG=y
CONFIG_FB=y
# CONFIG_VGA_CONSOLE is not set
CONFIG_FRAMEBUFFER_CONSOLE=y
+0 −9
Original line number Diff line number Diff line
@@ -89,15 +89,6 @@ config SSB_HOST_SOC

	  If unsure, say N

config SSB_DEBUG
	bool "SSB debugging"
	depends on SSB
	help
	  This turns on additional runtime checks and debugging
	  messages. Turn this on for SSB troubleshooting.

	  If unsure, say N

config SSB_SERIAL
	bool
	depends on SSB
+4 −4
Original line number Diff line number Diff line
@@ -56,7 +56,7 @@ void ssb_chipco_set_clockmode(struct ssb_chipcommon *cc,

	if (cc->capabilities & SSB_CHIPCO_CAP_PMU)
		return; /* PMU controls clockmode, separated function needed */
	SSB_WARN_ON(ccdev->id.revision >= 20);
	WARN_ON(ccdev->id.revision >= 20);

	/* chipcommon cores prior to rev6 don't support dynamic clock control */
	if (ccdev->id.revision < 6)
@@ -111,7 +111,7 @@ void ssb_chipco_set_clockmode(struct ssb_chipcommon *cc,
		}
		break;
	default:
		SSB_WARN_ON(1);
		WARN_ON(1);
	}
}

@@ -164,7 +164,7 @@ static int chipco_pctl_clockfreqlimit(struct ssb_chipcommon *cc, int get_max)
			divisor = 32;
			break;
		default:
			SSB_WARN_ON(1);
			WARN_ON(1);
		}
	} else if (cc->dev->id.revision < 10) {
		switch (clocksrc) {
@@ -277,7 +277,7 @@ static void calc_fast_powerup_delay(struct ssb_chipcommon *cc)
	minfreq = chipco_pctl_clockfreqlimit(cc, 0);
	pll_on_delay = chipco_read32(cc, SSB_CHIPCO_PLLONDELAY);
	tmp = (((pll_on_delay + 2) * 1000000) + (minfreq - 1)) / minfreq;
	SSB_WARN_ON(tmp & ~0xFFFF);
	WARN_ON(tmp & ~0xFFFF);

	cc->fast_pwrup_delay = tmp;
}
+5 −5
Original line number Diff line number Diff line
@@ -128,7 +128,7 @@ static void ssb_pmu0_pllinit_r0(struct ssb_chipcommon *cc,
			      ~(1 << SSB_PMURES_5354_BB_PLL_PU));
		break;
	default:
		SSB_WARN_ON(1);
		WARN_ON(1);
	}
	for (i = 1500; i; i--) {
		tmp = chipco_read32(cc, SSB_CHIPCO_CLKCTLST);
@@ -265,7 +265,7 @@ static void ssb_pmu1_pllinit_r0(struct ssb_chipcommon *cc,
		buffer_strength = 0x222222;
		break;
	default:
		SSB_WARN_ON(1);
		WARN_ON(1);
	}
	for (i = 1500; i; i--) {
		tmp = chipco_read32(cc, SSB_CHIPCO_CLKCTLST);
@@ -501,7 +501,7 @@ static void ssb_pmu_resources_init(struct ssb_chipcommon *cc)
					      ~(depend_tab[i].depend));
				break;
			default:
				SSB_WARN_ON(1);
				WARN_ON(1);
			}
		}
	}
@@ -568,12 +568,12 @@ void ssb_pmu_set_ldo_voltage(struct ssb_chipcommon *cc,
			mask = 0x3F;
			break;
		default:
			SSB_WARN_ON(1);
			WARN_ON(1);
			return;
		}
		break;
	case 0x4312:
		if (SSB_WARN_ON(id != LDO_PAREF))
		if (WARN_ON(id != LDO_PAREF))
			return;
		addr = 0;
		shift = 21;
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