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Commit b8b6069c authored by Michael Buesch's avatar Michael Buesch Committed by Kalle Valo
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ssb: Remove home-grown printk wrappers



Replace the ssb printk wrappers by standard print helpers.
Also remove SSB_SILENT. Nobody should use it anyway.

Originally submitted by Joe Perches <joe@perches.com>.
Modified to add dev_... based printks.

Signed-off-by: default avatarMichael Buesch <m@bues.ch>
Tested-by: default avatarMichael Buesch <m@bues.ch>
Cc: Joe Perches <joe@perches.com>
Signed-off-by: default avatarKalle Valo <kvalo@codeaurora.org>
parent 4d77a89e
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+1 −13
Original line number Diff line number Diff line
@@ -89,21 +89,9 @@ config SSB_HOST_SOC

	  If unsure, say N

config SSB_SILENT
	bool "No SSB kernel messages"
	depends on SSB && EXPERT
	help
	  This option turns off all Sonics Silicon Backplane printks.
	  Note that you won't be able to identify problems, once
	  messages are turned off.
	  This might only be desired for production kernels on
	  embedded devices to reduce the kernel size.

	  Say N

config SSB_DEBUG
	bool "SSB debugging"
	depends on SSB && !SSB_SILENT
	depends on SSB
	help
	  This turns on additional runtime checks and debugging
	  messages. Turn this on for SSB troubleshooting.
+2 −2
Original line number Diff line number Diff line
@@ -10,12 +10,12 @@
 * Licensed under the GNU/GPL. See COPYING for details.
 */

#include "ssb_private.h"

#include <linux/pci.h>
#include <linux/module.h>
#include <linux/ssb/ssb.h>

#include "ssb_private.h"


static const struct pci_device_id b43_pci_bridge_tbl[] = {
	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4301) },
+3 −3
Original line number Diff line number Diff line
@@ -6,6 +6,8 @@
 * Licensed under the GNU/GPL. See COPYING for details.
 */

#include "ssb_private.h"

#include <linux/ssb/ssb.h>
#include <linux/slab.h>
#include <linux/module.h>
@@ -15,8 +17,6 @@
#include <pcmcia/ds.h>
#include <pcmcia/cisreg.h>

#include "ssb_private.h"

static const struct pcmcia_device_id ssb_host_pcmcia_tbl[] = {
	PCMCIA_DEVICE_MANF_CARD(0x2D0, 0x448),
	PCMCIA_DEVICE_MANF_CARD(0x2D0, 0x476),
@@ -70,7 +70,7 @@ static int ssb_host_pcmcia_probe(struct pcmcia_device *dev)
err_kfree_ssb:
	kfree(ssb);
out_error:
	ssb_err("Initialization failed (%d, %d)\n", res, err);
	dev_err(&dev->dev, "Initialization failed (%d, %d)\n", res, err);
	return err;
}

+3 −3
Original line number Diff line number Diff line
@@ -9,14 +9,14 @@
 * Licensed under the GNU/GPL. See COPYING for details.
 */

#include "ssb_private.h"

#include <linux/ssb/ssb.h>
#include <linux/ssb/ssb_regs.h>
#include <linux/export.h>
#include <linux/pci.h>
#include <linux/bcm47xx_wdt.h>

#include "ssb_private.h"


/* Clock sources */
enum ssb_clksrc {
@@ -354,7 +354,7 @@ void ssb_chipcommon_init(struct ssb_chipcommon *cc)

	if (cc->dev->id.revision >= 11)
		cc->status = chipco_read32(cc, SSB_CHIPCO_CHIPSTAT);
	ssb_dbg("chipcommon status is 0x%x\n", cc->status);
	dev_dbg(cc->dev->dev, "chipcommon status is 0x%x\n", cc->status);

	if (cc->dev->id.revision >= 20) {
		chipco_write32(cc, SSB_CHIPCO_GPIOPULLUP, 0);
+15 −15
Original line number Diff line number Diff line
@@ -8,6 +8,8 @@
 * Licensed under the GNU/GPL. See COPYING for details.
 */

#include "ssb_private.h"

#include <linux/ssb/ssb.h>
#include <linux/ssb/ssb_regs.h>
#include <linux/ssb/ssb_driver_chipcommon.h>
@@ -17,8 +19,6 @@
#include <linux/bcm47xx_nvram.h>
#endif

#include "ssb_private.h"

static u32 ssb_chipco_pll_read(struct ssb_chipcommon *cc, u32 offset)
{
	chipco_write32(cc, SSB_CHIPCO_PLLCTL_ADDR, offset);
@@ -110,7 +110,7 @@ static void ssb_pmu0_pllinit_r0(struct ssb_chipcommon *cc,
		return;
	}

	ssb_info("Programming PLL to %u.%03u MHz\n",
	dev_info(cc->dev->dev, "Programming PLL to %u.%03u MHz\n",
		 crystalfreq / 1000, crystalfreq % 1000);

	/* First turn the PLL off. */
@@ -138,7 +138,7 @@ static void ssb_pmu0_pllinit_r0(struct ssb_chipcommon *cc,
	}
	tmp = chipco_read32(cc, SSB_CHIPCO_CLKCTLST);
	if (tmp & SSB_CHIPCO_CLKCTLST_HAVEHT)
		ssb_emerg("Failed to turn the PLL off!\n");
		dev_emerg(cc->dev->dev, "Failed to turn the PLL off!\n");

	/* Set PDIV in PLL control 0. */
	pllctl = ssb_chipco_pll_read(cc, SSB_PMU0_PLLCTL0);
@@ -249,7 +249,7 @@ static void ssb_pmu1_pllinit_r0(struct ssb_chipcommon *cc,
		return;
	}

	ssb_info("Programming PLL to %u.%03u MHz\n",
	dev_info(cc->dev->dev, "Programming PLL to %u.%03u MHz\n",
		 crystalfreq / 1000, crystalfreq % 1000);

	/* First turn the PLL off. */
@@ -275,7 +275,7 @@ static void ssb_pmu1_pllinit_r0(struct ssb_chipcommon *cc,
	}
	tmp = chipco_read32(cc, SSB_CHIPCO_CLKCTLST);
	if (tmp & SSB_CHIPCO_CLKCTLST_HAVEHT)
		ssb_emerg("Failed to turn the PLL off!\n");
		dev_emerg(cc->dev->dev, "Failed to turn the PLL off!\n");

	/* Set p1div and p2div. */
	pllctl = ssb_chipco_pll_read(cc, SSB_PMU1_PLLCTL0);
@@ -349,7 +349,7 @@ static void ssb_pmu_pll_init(struct ssb_chipcommon *cc)
	case 43222:
		break;
	default:
		ssb_err("ERROR: PLL init unknown for device %04X\n",
		dev_err(cc->dev->dev, "ERROR: PLL init unknown for device %04X\n",
			bus->chip_id);
	}
}
@@ -471,7 +471,7 @@ static void ssb_pmu_resources_init(struct ssb_chipcommon *cc)
		max_msk = 0xFFFFF;
		break;
	default:
		ssb_err("ERROR: PMU resource config unknown for device %04X\n",
		dev_err(cc->dev->dev, "ERROR: PMU resource config unknown for device %04X\n",
			bus->chip_id);
	}

@@ -524,7 +524,7 @@ void ssb_pmu_init(struct ssb_chipcommon *cc)
	pmucap = chipco_read32(cc, SSB_CHIPCO_PMU_CAP);
	cc->pmu.rev = (pmucap & SSB_CHIPCO_PMU_CAP_REVISION);

	ssb_dbg("Found rev %u PMU (capabilities 0x%08X)\n",
	dev_dbg(cc->dev->dev, "Found rev %u PMU (capabilities 0x%08X)\n",
		cc->pmu.rev, pmucap);

	if (cc->pmu.rev == 1)
@@ -636,7 +636,7 @@ u32 ssb_pmu_get_alp_clock(struct ssb_chipcommon *cc)
	case 0x5354:
		return ssb_pmu_get_alp_clock_clk0(cc);
	default:
		ssb_err("ERROR: PMU alp clock unknown for device %04X\n",
		dev_err(cc->dev->dev, "ERROR: PMU alp clock unknown for device %04X\n",
			bus->chip_id);
		return 0;
	}
@@ -651,7 +651,7 @@ u32 ssb_pmu_get_cpu_clock(struct ssb_chipcommon *cc)
		/* 5354 chip uses a non programmable PLL of frequency 240MHz */
		return 240000000;
	default:
		ssb_err("ERROR: PMU cpu clock unknown for device %04X\n",
		dev_err(cc->dev->dev, "ERROR: PMU cpu clock unknown for device %04X\n",
			bus->chip_id);
		return 0;
	}
@@ -665,7 +665,7 @@ u32 ssb_pmu_get_controlclock(struct ssb_chipcommon *cc)
	case 0x5354:
		return 120000000;
	default:
		ssb_err("ERROR: PMU controlclock unknown for device %04X\n",
		dev_err(cc->dev->dev, "ERROR: PMU controlclock unknown for device %04X\n",
			bus->chip_id);
		return 0;
	}
@@ -705,7 +705,7 @@ void ssb_pmu_spuravoid_pllupdate(struct ssb_chipcommon *cc, int spuravoid)
		pmu_ctl = SSB_CHIPCO_PMU_CTL_PLL_UPD;
		break;
	default:
		ssb_printk(KERN_ERR PFX
		dev_err(cc->dev->dev,
			"Unknown spuravoidance settings for chip 0x%04X, not changing PLL\n",
			cc->dev->bus->chip_id);
		return;
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