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Commit 1f2181a9 authored by Murali Karicheri's avatar Murali Karicheri Committed by Santosh Shilimkar
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ARM: keystone: dts: add paclk divider clock node



PA subsystem has a fixed factor clock at the input which is
input clock divided by 3. This patch adds this clock node to dts

Signed-off-by: default avatarMurali Karicheri <m-karicheri2@ti.com>
Signed-off-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
parent afdd8b61
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+9 −0
Original line number Diff line number Diff line
@@ -124,6 +124,15 @@ clocks {
		clock-output-names = "chipclk13";
	};

	paclk13: paclk13 {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clocks = <&papllclk>;
		clock-div = <3>;
		clock-mult = <1>;
		clock-output-names = "paclk13";
	};

	chipclk14: chipclk14 {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";