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Commit 0c91e7e0 authored by Nicolas Pitre's avatar Nicolas Pitre
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ARM: cacheflush: add synchronization helpers for mixed cache state accesses



Algorithms used by the MCPM layer rely on state variables which are
accessed while the cache is either active or inactive, depending
on the code path and the active state.

This patch introduces generic cache maintenance helpers to provide the
necessary cache synchronization for such state variables to always hit
main memory in an ordered way.

Signed-off-by: default avatarNicolas Pitre <nico@linaro.org>
Acked-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
Acked-by: default avatarDave Martin <dave.martin@linaro.org>
parent 6210d421
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