Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit ecb3c2bb authored by Catalin Marinas's avatar Catalin Marinas
Browse files

Merge tag 'deps-irqchip-gic-3.17' of git://git.infradead.org/users/jcooper/linux

* tag 'deps-irqchip-gic-3.17' of git://git.infradead.org/users/jcooper/linux:
  irqchip: gic-v3: Initial support for GICv3
  irqchip: gic: Move some bits of GICv2 to a library-type file

Conflicts:
	arch/arm64/Kconfig
parents 05ac6530 021f6537
Loading
Loading
Loading
Loading
+1 −0
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ config ARM64
	select ARM_ARCH_TIMER
	select ARM_GIC
	select AUDIT_ARCH_COMPAT_GENERIC
	select ARM_GIC_V3
	select BUILDTIME_EXTABLE_SORT
	select CLONE_BACKWARDS
	select COMMON_CLK
+18 −0
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@

#include <linux/linkage.h>
#include <linux/init.h>
#include <linux/irqchip/arm-gic-v3.h>

#include <asm/assembler.h>
#include <asm/ptrace.h>
@@ -289,6 +290,23 @@ CPU_LE( bic x0, x0, #(3 << 24) ) // Clear the EE and E0E bits for EL1
	msr	cnthctl_el2, x0
	msr	cntvoff_el2, xzr		// Clear virtual offset

#ifdef CONFIG_ARM_GIC_V3
	/* GICv3 system register access */
	mrs	x0, id_aa64pfr0_el1
	ubfx	x0, x0, #24, #4
	cmp	x0, #1
	b.ne	3f

	mrs	x0, ICC_SRE_EL2
	orr	x0, x0, #ICC_SRE_EL2_SRE	// Set ICC_SRE_EL2.SRE==1
	orr	x0, x0, #ICC_SRE_EL2_ENABLE	// Set ICC_SRE_EL2.Enable==1
	msr	ICC_SRE_EL2, x0
	isb					// Make sure SRE is now set
	msr	ICH_HCR_EL2, xzr		// Reset ICC_HCR_EL2 to defaults

3:
#endif

	/* Populate ID registers. */
	mrs	x0, midr_el1
	mrs	x1, mpidr_el1
+1 −0
Original line number Diff line number Diff line
@@ -19,6 +19,7 @@

#include <linux/init.h>
#include <linux/linkage.h>
#include <linux/irqchip/arm-gic-v3.h>

#include <asm/assembler.h>
#include <asm/ptrace.h>
+5 −0
Original line number Diff line number Diff line
@@ -10,6 +10,11 @@ config ARM_GIC
config GIC_NON_BANKED
	bool

config ARM_GIC_V3
	bool
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER

config ARM_NVIC
	bool
	select IRQ_DOMAIN
+2 −1
Original line number Diff line number Diff line
@@ -15,7 +15,8 @@ obj-$(CONFIG_ORION_IRQCHIP) += irq-orion.o
obj-$(CONFIG_ARCH_SUNXI)		+= irq-sun4i.o
obj-$(CONFIG_ARCH_SUNXI)		+= irq-sunxi-nmi.o
obj-$(CONFIG_ARCH_SPEAR3XX)		+= spear-shirq.o
obj-$(CONFIG_ARM_GIC)			+= irq-gic.o
obj-$(CONFIG_ARM_GIC)			+= irq-gic.o irq-gic-common.o
obj-$(CONFIG_ARM_GIC_V3)		+= irq-gic-v3.o irq-gic-common.o
obj-$(CONFIG_ARM_NVIC)			+= irq-nvic.o
obj-$(CONFIG_ARM_VIC)			+= irq-vic.o
obj-$(CONFIG_IMGPDC_IRQ)		+= irq-imgpdc.o
Loading