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Commit d9682759 authored by David Daney's avatar David Daney Committed by Ralf Baechle
Browse files

MIPS: Don't clobber CP0_STATUS value for CONFIG_MIPS_MT_SMTC 



Reported-by: default avatarEdgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: default avatarDavid Daney <david.daney@cavium.com>
Patchwork: https://patchwork.linux-mips.org/patch/2753/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 465aaed0

arch/mips/include/asm/stackframe.h

+2 −2
Original line number Diff line number Diff line
@@ -195,9 +195,9 @@ 
		 * to cover the pipeline delay.

		 */

		.set	mips32

		mfc0	v1, CP0_TCSTATUS

		mfc0	k0, CP0_TCSTATUS

		.set	mips0

		LONG_S	v1, PT_TCSTATUS(sp)

		LONG_S	k0, PT_TCSTATUS(sp)

#endif /* CONFIG_MIPS_MT_SMTC */

		LONG_S	$4, PT_R4(sp)

		LONG_S	$5, PT_R5(sp)