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Commit 465aaed0 authored by David Daney's avatar David Daney Committed by Ralf Baechle
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MIPS: Octeon: Select CONFIG_HOLES_IN_ZONE



Current Octeon systems do in fact have holes in their memory zones.
We need to select HOLES_IN_ZONE.  If we do not, some memory
configurations will result in crashes at boot time like this:

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.
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CPU 6 Unable to handle kernel paging request at virtual address 0000000000700000, epc == ffffffff8118fe00, ra == ffffffff8118fe9c
Oops[#1]:
Cpu 6
.
.
.
        ...
Call Trace:
[<ffffffff8118fe00>] setup_per_zone_wmarks+0x1b0/0x338
[<ffffffff815cd738>] init_per_zone_wmark_min+0x64/0xd0
[<ffffffff81100438>] do_one_initcall+0x38/0x160
.
.
.

Reported-by: default avatarJason Kwon <jason.kwon@ericsson.com>
Signed-off-by: default avatarDavid Daney <david.daney@cavium.com>
To: linux-mips@linux-mips.org
Cc: Jason Kwon <jason.kwon@ericsson.com>
Patchwork: https://patchwork.linux-mips.org/patch/2724/


Tested-by: default avatarGuenter <Roeck&lt;guenter.roeck@ericsson.com>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent bd710009
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+5 −0
Original line number Diff line number Diff line
@@ -723,6 +723,7 @@ config CAVIUM_OCTEON_SIMULATOR
	select SYS_SUPPORTS_HIGHMEM
	select SYS_SUPPORTS_HOTPLUG_CPU
	select SYS_HAS_CPU_CAVIUM_OCTEON
	select HOLES_IN_ZONE
	help
	  The Octeon simulator is software performance model of the Cavium
	  Octeon Processor. It supports simulating Octeon processors on x86
@@ -745,6 +746,7 @@ config CAVIUM_OCTEON_REFERENCE_BOARD
	select ZONE_DMA32
	select USB_ARCH_HAS_OHCI
	select USB_ARCH_HAS_EHCI
	select HOLES_IN_ZONE
	help
	  This option supports all of the Octeon reference boards from Cavium
	  Networks. It builds a kernel that dynamically determines the Octeon
@@ -974,6 +976,9 @@ config ISA_DMA_API
config GENERIC_GPIO
	bool

config HOLES_IN_ZONE
	bool

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