Loading arch/mips/mips-boards/atlas/atlas_int.c +2 −3 Original line number Original line Diff line number Diff line Loading @@ -248,14 +248,13 @@ void __init arch_init_irq(void) case MIPS_REVISION_CORID_CORE_24K: case MIPS_REVISION_CORID_CORE_24K: case MIPS_REVISION_CORID_CORE_EMUL_MSC: case MIPS_REVISION_CORID_CORE_EMUL_MSC: if (cpu_has_veic) if (cpu_has_veic) init_msc_irqs (MSC01E_INT_BASE, init_msc_irqs (MSC01E_INT_BASE, MSC01E_INT_BASE, msc_eicirqmap, msc_nr_eicirqs); msc_eicirqmap, msc_nr_eicirqs); else else init_msc_irqs (MSC01C_INT_BASE, init_msc_irqs (MSC01E_INT_BASE, MSC01C_INT_BASE, msc_irqmap, msc_nr_irqs); msc_irqmap, msc_nr_irqs); } } if (cpu_has_veic) { if (cpu_has_veic) { set_vi_handler (MSC01E_INT_ATLAS, atlas_hw0_irqdispatch); set_vi_handler (MSC01E_INT_ATLAS, atlas_hw0_irqdispatch); setup_irq (MSC01E_INT_BASE + MSC01E_INT_ATLAS, &atlasirq); setup_irq (MSC01E_INT_BASE + MSC01E_INT_ATLAS, &atlasirq); Loading Loading
arch/mips/mips-boards/atlas/atlas_int.c +2 −3 Original line number Original line Diff line number Diff line Loading @@ -248,14 +248,13 @@ void __init arch_init_irq(void) case MIPS_REVISION_CORID_CORE_24K: case MIPS_REVISION_CORID_CORE_24K: case MIPS_REVISION_CORID_CORE_EMUL_MSC: case MIPS_REVISION_CORID_CORE_EMUL_MSC: if (cpu_has_veic) if (cpu_has_veic) init_msc_irqs (MSC01E_INT_BASE, init_msc_irqs (MSC01E_INT_BASE, MSC01E_INT_BASE, msc_eicirqmap, msc_nr_eicirqs); msc_eicirqmap, msc_nr_eicirqs); else else init_msc_irqs (MSC01C_INT_BASE, init_msc_irqs (MSC01E_INT_BASE, MSC01C_INT_BASE, msc_irqmap, msc_nr_irqs); msc_irqmap, msc_nr_irqs); } } if (cpu_has_veic) { if (cpu_has_veic) { set_vi_handler (MSC01E_INT_ATLAS, atlas_hw0_irqdispatch); set_vi_handler (MSC01E_INT_ATLAS, atlas_hw0_irqdispatch); setup_irq (MSC01E_INT_BASE + MSC01E_INT_ATLAS, &atlasirq); setup_irq (MSC01E_INT_BASE + MSC01E_INT_ATLAS, &atlasirq); Loading