+1
−2
Loading
Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more
Some non-DSP enabled cores 24K / 34K can generate a DSP exception where they are actually expected to produce a reserved instruction exception. Signed-off-by:Chris Dearman <chris@mips.com> Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>