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Commit cdc7594e authored by Bastian Hecht's avatar Bastian Hecht Committed by Simon Horman
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ARM: shmobile: r8a7779: Replace modify_scu_cpu_psr with scu_power_mode 



We can remove the extra code of modify_scu_cpu_psr() and use the cleaner
generic ARM helper scu_power_mode(). As every CPU only deals with its
own power register and scu_power_mode() operates with 8-bit accesses,
we save the locking overhead too.

Signed-off-by: default avatarBastian Hecht <hechtb@gmail.com>
Signed-off-by: default avatarSimon Horman <horms@verge.net.au>
parent e7212951

arch/arm/mach-shmobile/smp-r8a7779.c

+3 −22
Original line number Diff line number Diff line
@@ -61,9 +61,6 @@ static void __iomem *scu_base_addr(void) 
	return (void __iomem *)0xf0000000;

}



static DEFINE_SPINLOCK(scu_lock);

static unsigned long tmp;



#ifdef CONFIG_HAVE_ARM_TWD

static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29);
@@ -73,20 +70,6 @@ void __init r8a7779_register_twd(void) 
}

#endif



static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)

{

	void __iomem *scu_base = scu_base_addr();



	spin_lock(&scu_lock);

	tmp = __raw_readl(scu_base + 8);

	tmp &= ~clr;

	tmp |= set;

	spin_unlock(&scu_lock);



	/* disable cache coherency after releasing the lock */

	__raw_writel(tmp, scu_base + 8);

}



static unsigned int __init r8a7779_get_core_count(void)

{

	void __iomem *scu_base = scu_base_addr();
@@ -102,7 +85,7 @@ static int r8a7779_platform_cpu_kill(unsigned int cpu) 
	cpu = cpu_logical_map(cpu);



	/* disable cache coherency */

	modify_scu_cpu_psr(3 << (cpu * 8), 0);

	scu_power_mode(scu_base_addr(), 3);



	if (cpu < ARRAY_SIZE(r8a7779_ch_cpu))

		ch = r8a7779_ch_cpu[cpu];
@@ -145,7 +128,7 @@ static int __cpuinit r8a7779_boot_secondary(unsigned int cpu, struct task_struct 
	cpu = cpu_logical_map(cpu);



	/* enable cache coherency */

	modify_scu_cpu_psr(0, 3 << (cpu * 8));

	scu_power_mode(scu_base_addr(), 0);



	if (cpu < ARRAY_SIZE(r8a7779_ch_cpu))

		ch = r8a7779_ch_cpu[cpu];
@@ -158,15 +141,13 @@ static int __cpuinit r8a7779_boot_secondary(unsigned int cpu, struct task_struct 


static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)

{

	int cpu = cpu_logical_map(0);



	scu_enable(scu_base_addr());



	/* Map the reset vector (in headsmp.S) */

	__raw_writel(__pa(shmobile_secondary_vector), AVECR);



	/* enable cache coherency on CPU0 */

	modify_scu_cpu_psr(0, 3 << (cpu * 8));

	scu_power_mode(scu_base_addr(), 0);



	r8a7779_pm_init();