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Commit e7212951 authored by Bastian Hecht's avatar Bastian Hecht Committed by Simon Horman
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ARM: shmobile: sh73a0: Replace modify_scu_cpu_psr with scu_power_mode 



We can remove the extra code of modify_scu_cpu_psr() and use the cleaner
generic ARM helper scu_power_mode(). As every CPU only deals with its
own power register and scu_power_mode() operates with 8-bit accesses,
we save the locking overhead too.

Signed-off-by: default avatarBastian Hecht <hechtb@gmail.com>
Signed-off-by: default avatarSimon Horman <horms@verge.net.au>
parent 865d90f8

arch/arm/mach-shmobile/smp-sh73a0.c

+2 −21
Original line number Diff line number Diff line
@@ -41,9 +41,6 @@ static void __iomem *scu_base_addr(void) 
	return (void __iomem *)0xf0000000;

}



static DEFINE_SPINLOCK(scu_lock);

static unsigned long tmp;



#ifdef CONFIG_HAVE_ARM_TWD

static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29);

void __init sh73a0_register_twd(void)
@@ -52,20 +49,6 @@ void __init sh73a0_register_twd(void) 
}

#endif



static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)

{

	void __iomem *scu_base = scu_base_addr();



	spin_lock(&scu_lock);

	tmp = __raw_readl(scu_base + 8);

	tmp &= ~clr;

	tmp |= set;

	spin_unlock(&scu_lock);



	/* disable cache coherency after releasing the lock */

	__raw_writel(tmp, scu_base + 8);

}



static unsigned int __init sh73a0_get_core_count(void)

{

	void __iomem *scu_base = scu_base_addr();
@@ -83,7 +66,7 @@ static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct 
	cpu = cpu_logical_map(cpu);



	/* enable cache coherency */

	modify_scu_cpu_psr(0, 3 << (cpu * 8));

	scu_power_mode(scu_base_addr(), 0);



	if (((__raw_readl(PSTR) >> (4 * cpu)) & 3) == 3)

		__raw_writel(1 << cpu, WUPCR);	/* wake up */
@@ -95,8 +78,6 @@ static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct 


static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)

{

	int cpu = cpu_logical_map(0);



	scu_enable(scu_base_addr());



	/* Map the reset vector (in headsmp.S) */
@@ -104,7 +85,7 @@ static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus) 
	__raw_writel(__pa(shmobile_secondary_vector), SBAR);



	/* enable cache coherency on CPU0 */

	modify_scu_cpu_psr(0, 3 << (cpu * 8));

	scu_power_mode(scu_base_addr(), 0);

}



static void __init sh73a0_smp_init_cpus(void)