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Commit b6a23e91 authored by Michael Chan's avatar Michael Chan Committed by David S. Miller
Browse files

bnx2: Refactor WoL setup into a separate function. 



Separate MAC and PHY WoL setup code into a separate function.

Signed-off-by: default avatarMichael Chan <mchan@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 6d5e85c7

drivers/net/ethernet/broadcom/bnx2.c

+81 −80
Original line number Diff line number Diff line
@@ -3908,27 +3908,9 @@ bnx2_init_cpus(struct bnx2 *bp) 
	return rc;

}



static int

bnx2_set_power_state(struct bnx2 *bp, pci_power_t state)

static void

bnx2_setup_wol(struct bnx2 *bp)

{

	switch (state) {

	case PCI_D0: {

		u32 val;



		pci_enable_wake(bp->pdev, PCI_D0, false);

		pci_set_power_state(bp->pdev, PCI_D0);



		val = BNX2_RD(bp, BNX2_EMAC_MODE);

		val |= BNX2_EMAC_MODE_MPKT_RCVD | BNX2_EMAC_MODE_ACPI_RCVD;

		val &= ~BNX2_EMAC_MODE_MPKT;

		BNX2_WR(bp, BNX2_EMAC_MODE, val);



		val = BNX2_RD(bp, BNX2_RPM_CONFIG);

		val &= ~BNX2_RPM_CONFIG_ACPI_ENA;

		BNX2_WR(bp, BNX2_RPM_CONFIG, val);

		break;

	}

	case PCI_D3hot: {

	int i;

	u32 val, wol_msg;
@@ -3964,9 +3946,9 @@ bnx2_set_power_state(struct bnx2 *bp, pci_power_t state) 
		val |= BNX2_EMAC_MODE_MPKT_RCVD |

		       BNX2_EMAC_MODE_ACPI_RCVD |

		       BNX2_EMAC_MODE_MPKT;

			if (bp->phy_port == PORT_TP)

		if (bp->phy_port == PORT_TP) {

			val |= BNX2_EMAC_MODE_PORT_MII;

			else {

		} else {

			val |= BNX2_EMAC_MODE_PORT_GMII;

			if (bp->line_speed == SPEED_2500)

				val |= BNX2_EMAC_MODE_25G_MODE;
@@ -3979,15 +3961,12 @@ bnx2_set_power_state(struct bnx2 *bp, pci_power_t state) 
			BNX2_WR(bp, BNX2_EMAC_MULTICAST_HASH0 + (i * 4),

				0xffffffff);

		}

			BNX2_WR(bp, BNX2_EMAC_RX_MODE,

				BNX2_EMAC_RX_MODE_SORT_MODE);

		BNX2_WR(bp, BNX2_EMAC_RX_MODE, BNX2_EMAC_RX_MODE_SORT_MODE);



			val = 1 | BNX2_RPM_SORT_USER0_BC_EN |

			      BNX2_RPM_SORT_USER0_MC_EN;

		val = 1 | BNX2_RPM_SORT_USER0_BC_EN | BNX2_RPM_SORT_USER0_MC_EN;

		BNX2_WR(bp, BNX2_RPM_SORT_USER0, 0x0);

		BNX2_WR(bp, BNX2_RPM_SORT_USER0, val);

			BNX2_WR(bp, BNX2_RPM_SORT_USER0, val |

				BNX2_RPM_SORT_USER0_ENA);

		BNX2_WR(bp, BNX2_RPM_SORT_USER0, val | BNX2_RPM_SORT_USER0_ENA);



		/* Need to enable EMAC and RPM for WOL. */

		BNX2_WR(bp, BNX2_MISC_ENABLE_SET_BITS,
@@ -4000,15 +3979,37 @@ bnx2_set_power_state(struct bnx2 *bp, pci_power_t state) 
		BNX2_WR(bp, BNX2_RPM_CONFIG, val);



		wol_msg = BNX2_DRV_MSG_CODE_SUSPEND_WOL;

		}

		else {

	} else {

			wol_msg = BNX2_DRV_MSG_CODE_SUSPEND_NO_WOL;

	}



	if (!(bp->flags & BNX2_FLAG_NO_WOL))

			bnx2_fw_sync(bp, BNX2_DRV_MSG_DATA_WAIT3 | wol_msg,

				     1, 0);

		bnx2_fw_sync(bp, BNX2_DRV_MSG_DATA_WAIT3 | wol_msg, 1, 0);



}



static int

bnx2_set_power_state(struct bnx2 *bp, pci_power_t state)

{

	switch (state) {

	case PCI_D0: {

		u32 val;



		pci_enable_wake(bp->pdev, PCI_D0, false);

		pci_set_power_state(bp->pdev, PCI_D0);



		val = BNX2_RD(bp, BNX2_EMAC_MODE);

		val |= BNX2_EMAC_MODE_MPKT_RCVD | BNX2_EMAC_MODE_ACPI_RCVD;

		val &= ~BNX2_EMAC_MODE_MPKT;

		BNX2_WR(bp, BNX2_EMAC_MODE, val);



		val = BNX2_RD(bp, BNX2_RPM_CONFIG);

		val &= ~BNX2_RPM_CONFIG_ACPI_ENA;

		BNX2_WR(bp, BNX2_RPM_CONFIG, val);

		break;

	}

	case PCI_D3hot: {

		bnx2_setup_wol(bp);

		pci_wake_from_d3(bp->pdev, bp->wol);

		if ((BNX2_CHIP_ID(bp) == BNX2_CHIP_ID_5706_A0) ||

		    (BNX2_CHIP_ID(bp) == BNX2_CHIP_ID_5706_A1)) {