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Commit 6d5e85c7 authored by Michael Chan's avatar Michael Chan Committed by David S. Miller
Browse files

bnx2: Use kernel APIs for WoL and power state changes. 



Simple API changes with no functional changes.

Signed-off-by: default avatarMichael Chan <mchan@broadocm.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 02481bc6

drivers/net/ethernet/broadcom/bnx2.c

+14 −22
Original line number Diff line number Diff line
@@ -3911,21 +3911,12 @@ bnx2_init_cpus(struct bnx2 *bp) 
static int

bnx2_set_power_state(struct bnx2 *bp, pci_power_t state)

{

	u16 pmcsr;



	pci_read_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL, &pmcsr);



	switch (state) {

	case PCI_D0: {

		u32 val;



		pci_write_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL,

			(pmcsr & ~PCI_PM_CTRL_STATE_MASK) |

			PCI_PM_CTRL_PME_STATUS);



		if (pmcsr & PCI_PM_CTRL_STATE_MASK)

			/* delay required during transition out of D3hot */

			msleep(20);

		pci_enable_wake(bp->pdev, PCI_D0, false);

		pci_set_power_state(bp->pdev, PCI_D0);



		val = BNX2_RD(bp, BNX2_EMAC_MODE);

		val |= BNX2_EMAC_MODE_MPKT_RCVD | BNX2_EMAC_MODE_ACPI_RCVD;
@@ -4018,26 +4009,19 @@ bnx2_set_power_state(struct bnx2 *bp, pci_power_t state) 
			bnx2_fw_sync(bp, BNX2_DRV_MSG_DATA_WAIT3 | wol_msg,

				     1, 0);



		pmcsr &= ~PCI_PM_CTRL_STATE_MASK;

		pci_wake_from_d3(bp->pdev, bp->wol);

		if ((BNX2_CHIP_ID(bp) == BNX2_CHIP_ID_5706_A0) ||

		    (BNX2_CHIP_ID(bp) == BNX2_CHIP_ID_5706_A1)) {



			if (bp->wol)

				pmcsr |= 3;

		}

		else {

			pmcsr |= 3;

		}

		if (bp->wol) {

			pmcsr |= PCI_PM_CTRL_PME_ENABLE;

				pci_set_power_state(bp->pdev, PCI_D3hot);

		} else {

			pci_set_power_state(bp->pdev, PCI_D3hot);

		}

		pci_write_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL,

				      pmcsr);



		/* No more memory access after this point until

		 * device is brought back to D0.

		 */

		udelay(50);

		break;

	}

	default:
@@ -7081,6 +7065,9 @@ bnx2_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 
	else {

		bp->wol = 0;

	}



	device_set_wakeup_enable(&bp->pdev->dev, bp->wol);



	return 0;

}
@@ -8369,6 +8356,11 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev) 
		bp->wol = 0;

	}



	if (bp->flags & BNX2_FLAG_NO_WOL)

		device_set_wakeup_capable(&bp->pdev->dev, false);

	else

		device_set_wakeup_enable(&bp->pdev->dev, bp->wol);



	if (BNX2_CHIP_ID(bp) == BNX2_CHIP_ID_5706_A0) {

		bp->tx_quick_cons_trip_int =

			bp->tx_quick_cons_trip;