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Commit af111bce authored by Vladimir Barinov's avatar Vladimir Barinov Committed by Simon Horman
Browse files

arm64: dts: h3ulcb: enable SCIF clk and pins 



This enables the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

Signed-off-by: default avatarVladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent b10690d1

arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts

+13 −0
Original line number Diff line number Diff line
@@ -37,10 +37,18 @@ 
};



&pfc {

	pinctrl-0 = <&scif_clk_pins>;

	pinctrl-names = "default";



	scif2_pins: scif2 {

		groups = "scif2_data_a";

		function = "scif2";

	};



	scif_clk_pins: scif_clk {

		groups = "scif_clk_a";

		function = "scif_clk";

	};

};



&scif2 {
@@ -49,3 +57,8 @@ 


	status = "okay";

};



&scif_clk {

	clock-frequency = <14745600>;

	status = "okay";

};