Commit a48ac3a1 authored Jan 27, 2016 by Ralf Baechle

MIPS: VR41xx: Use __flush_cache_all instead of flush_cache_all.

It's probably a good idea to flush caches before reset and by the time
this code was written flush_cache_all did actually still do something.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

parent 7c8196fd

arch/mips/vr41xx/common/pmu.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -73,7 +73,7 @@ static inline void software_reset(void)
		default:
		set_c0_status(ST0_BEV \| ST0_ERL);
		change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
		flush_cache_all();
		__flush_cache_all();
		write_c0_wired(0);
		__asm__("jr %0"::"r"(0xbfc00000));
		break;