Merge branch 'pxa/fixes' into next/fixes (91fed558) · Commits · e / devices / android_kernel_teracube_2e

arch/arm/Kconfig

+1 −0

Original line number	Original line	Diff line number	Diff line
	@@ -1953,6 +1953,7 @@ config CPU_FREQ_PXA
	bool		bool
	depends on CPU_FREQ && ARCH_PXA && PXA25x		depends on CPU_FREQ && ARCH_PXA && PXA25x
	default y		default y
			select CPU_FREQ_TABLE
	select CPU_FREQ_DEFAULT_GOV_USERSPACE		select CPU_FREQ_DEFAULT_GOV_USERSPACE

	config CPU_FREQ_S3C		config CPU_FREQ_S3C

arch/arm/include/asm/hardware/it8152.h

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -9,7 +9,7 @@

	#ifndef __ASM_HARDWARE_IT8152_H		#ifndef __ASM_HARDWARE_IT8152_H
	#define __ASM_HARDWARE_IT8152_H		#define __ASM_HARDWARE_IT8152_H
	extern unsigned long it8152_base_address;		extern void __iomem *it8152_base_address;

	#define IT8152_IO_BASE (it8152_base_address + 0x03e00000)		#define IT8152_IO_BASE (it8152_base_address + 0x03e00000)
	#define IT8152_CFGREG_BASE (it8152_base_address + 0x03f00000)		#define IT8152_CFGREG_BASE (it8152_base_address + 0x03f00000)

arch/arm/mach-mmp/Kconfig

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -77,7 +77,7 @@ config MACH_TETON_BGA
	Say 'Y' here if you want to support the Marvell PXA168-based		Say 'Y' here if you want to support the Marvell PXA168-based
	Teton BGA Development Board.		Teton BGA Development Board.

	config MACH_SHEEVAD		config MACH_GPLUGD
	bool "Marvell's PXA168 GuruPlug Display (gplugD) Board"		bool "Marvell's PXA168 GuruPlug Display (gplugD) Board"
	select CPU_PXA168		select CPU_PXA168
	help		help

arch/arm/mach-mmp/Makefile

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -19,4 +19,4 @@ obj-$(CONFIG_MACH_BROWNSTONE) += brownstone.o
	obj-$(CONFIG_MACH_FLINT) += flint.o		obj-$(CONFIG_MACH_FLINT) += flint.o
	obj-$(CONFIG_MACH_MARVELL_JASPER) += jasper.o		obj-$(CONFIG_MACH_MARVELL_JASPER) += jasper.o
	obj-$(CONFIG_MACH_TETON_BGA) += teton_bga.o		obj-$(CONFIG_MACH_TETON_BGA) += teton_bga.o
	obj-$(CONFIG_MACH_SHEEVAD) += gplugd.o		obj-$(CONFIG_MACH_GPLUGD) += gplugd.o

arch/arm/mach-mmp/clock.h

+4 −4

Original line number	Original line	Diff line number	Diff line
	@@ -30,7 +30,7 @@ extern struct clkops apmu_clk_ops;

	#define APBC_CLK(_name, _reg, _fnclksel, _rate) \		#define APBC_CLK(_name, _reg, _fnclksel, _rate) \
	struct clk clk_##_name = { \		struct clk clk_##_name = { \
	.clk_rst = (void __iomem *)APBC_##_reg, \		.clk_rst = APBC_##_reg, \
	.fnclksel = _fnclksel, \		.fnclksel = _fnclksel, \
	.rate = _rate, \		.rate = _rate, \
	.ops = &apbc_clk_ops, \		.ops = &apbc_clk_ops, \
	@@ -38,7 +38,7 @@ struct clk clk_##_name = { \

	#define APBC_CLK_OPS(_name, _reg, _fnclksel, _rate, _ops) \		#define APBC_CLK_OPS(_name, _reg, _fnclksel, _rate, _ops) \
	struct clk clk_##_name = { \		struct clk clk_##_name = { \
	.clk_rst = (void __iomem *)APBC_##_reg, \		.clk_rst = APBC_##_reg, \
	.fnclksel = _fnclksel, \		.fnclksel = _fnclksel, \
	.rate = _rate, \		.rate = _rate, \
	.ops = _ops, \		.ops = _ops, \
	@@ -46,7 +46,7 @@ struct clk clk_##_name = { \

	#define APMU_CLK(_name, _reg, _eval, _rate) \		#define APMU_CLK(_name, _reg, _eval, _rate) \
	struct clk clk_##_name = { \		struct clk clk_##_name = { \
	.clk_rst = (void __iomem *)APMU_##_reg, \		.clk_rst = APMU_##_reg, \
	.enable_val = _eval, \		.enable_val = _eval, \
	.rate = _rate, \		.rate = _rate, \
	.ops = &apmu_clk_ops, \		.ops = &apmu_clk_ops, \
	@@ -54,7 +54,7 @@ struct clk clk_##_name = { \

	#define APMU_CLK_OPS(_name, _reg, _eval, _rate, _ops) \		#define APMU_CLK_OPS(_name, _reg, _eval, _rate, _ops) \
	struct clk clk_##_name = { \		struct clk clk_##_name = { \
	.clk_rst = (void __iomem *)APMU_##_reg, \		.clk_rst = APMU_##_reg, \
	.enable_val = _eval, \		.enable_val = _eval, \
	.rate = _rate, \		.rate = _rate, \
	.ops = _ops, \		.ops = _ops, \