Loading arch/arm/mach-imx/Kconfig +1 −0 Original line number Diff line number Diff line Loading @@ -449,6 +449,7 @@ config MACH_MX31_3DS select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_IPU_CORE select IMX_HAVE_PLATFORM_MXC_EHCI select IMX_HAVE_PLATFORM_MXC_MMC select IMX_HAVE_PLATFORM_MXC_NAND select IMX_HAVE_PLATFORM_SPI_IMX select MXC_ULPI if USB_ULPI Loading arch/arm/mach-imx/mach-mx31_3ds.c +1 −1 Original line number Diff line number Diff line Loading @@ -542,7 +542,7 @@ static const struct mxc_nand_platform_data mx31_3ds_nand_board_info __initconst = { .width = 1, .hw_ecc = 1, #ifdef MACH_MX31_3DS_MXC_NAND_USE_BBT #ifdef CONFIG_MACH_MX31_3DS_MXC_NAND_USE_BBT .flash_bbt = 1, #endif }; Loading arch/arm/mach-mxs/clock-mx28.c +1 −1 Original line number Diff line number Diff line Loading @@ -349,7 +349,7 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \ \ reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##fr); \ reg &= ~BM_CLKCTRL_##fr##_##fs##FRAC; \ reg |= frac; \ reg |= frac << BP_CLKCTRL_##fr##_##fs##FRAC; \ __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_##fr); \ } \ \ Loading arch/arm/plat-mxc/include/mach/iomux-v3.h +5 −5 Original line number Diff line number Diff line Loading @@ -89,11 +89,11 @@ typedef u64 iomux_v3_cfg_t; #define PAD_CTL_HYS (1 << 8) #define PAD_CTL_PKE (1 << 7) #define PAD_CTL_PUE (1 << 6) #define PAD_CTL_PUS_100K_DOWN (0 << 4) #define PAD_CTL_PUS_47K_UP (1 << 4) #define PAD_CTL_PUS_100K_UP (2 << 4) #define PAD_CTL_PUS_22K_UP (3 << 4) #define PAD_CTL_PUE (1 << 6 | PAD_CTL_PKE) #define PAD_CTL_PUS_100K_DOWN (0 << 4 | PAD_CTL_PUE) #define PAD_CTL_PUS_47K_UP (1 << 4 | PAD_CTL_PUE) #define PAD_CTL_PUS_100K_UP (2 << 4 | PAD_CTL_PUE) #define PAD_CTL_PUS_22K_UP (3 << 4 | PAD_CTL_PUE) #define PAD_CTL_ODE (1 << 3) Loading Loading
arch/arm/mach-imx/Kconfig +1 −0 Original line number Diff line number Diff line Loading @@ -449,6 +449,7 @@ config MACH_MX31_3DS select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_IPU_CORE select IMX_HAVE_PLATFORM_MXC_EHCI select IMX_HAVE_PLATFORM_MXC_MMC select IMX_HAVE_PLATFORM_MXC_NAND select IMX_HAVE_PLATFORM_SPI_IMX select MXC_ULPI if USB_ULPI Loading
arch/arm/mach-imx/mach-mx31_3ds.c +1 −1 Original line number Diff line number Diff line Loading @@ -542,7 +542,7 @@ static const struct mxc_nand_platform_data mx31_3ds_nand_board_info __initconst = { .width = 1, .hw_ecc = 1, #ifdef MACH_MX31_3DS_MXC_NAND_USE_BBT #ifdef CONFIG_MACH_MX31_3DS_MXC_NAND_USE_BBT .flash_bbt = 1, #endif }; Loading
arch/arm/mach-mxs/clock-mx28.c +1 −1 Original line number Diff line number Diff line Loading @@ -349,7 +349,7 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \ \ reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##fr); \ reg &= ~BM_CLKCTRL_##fr##_##fs##FRAC; \ reg |= frac; \ reg |= frac << BP_CLKCTRL_##fr##_##fs##FRAC; \ __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_##fr); \ } \ \ Loading
arch/arm/plat-mxc/include/mach/iomux-v3.h +5 −5 Original line number Diff line number Diff line Loading @@ -89,11 +89,11 @@ typedef u64 iomux_v3_cfg_t; #define PAD_CTL_HYS (1 << 8) #define PAD_CTL_PKE (1 << 7) #define PAD_CTL_PUE (1 << 6) #define PAD_CTL_PUS_100K_DOWN (0 << 4) #define PAD_CTL_PUS_47K_UP (1 << 4) #define PAD_CTL_PUS_100K_UP (2 << 4) #define PAD_CTL_PUS_22K_UP (3 << 4) #define PAD_CTL_PUE (1 << 6 | PAD_CTL_PKE) #define PAD_CTL_PUS_100K_DOWN (0 << 4 | PAD_CTL_PUE) #define PAD_CTL_PUS_47K_UP (1 << 4 | PAD_CTL_PUE) #define PAD_CTL_PUS_100K_UP (2 << 4 | PAD_CTL_PUE) #define PAD_CTL_PUS_22K_UP (3 << 4 | PAD_CTL_PUE) #define PAD_CTL_ODE (1 << 3) Loading