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Commit 9199fbdb authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/mc/nv50: define reset masks + intr cleanup



Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 73549020
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+1 −0
Original line number Diff line number Diff line
nvkm-y += nvkm/subdev/mc/base.o
nvkm-y += nvkm/subdev/mc/nv04.o
nvkm-y += nvkm/subdev/mc/nv17.o
nvkm-y += nvkm/subdev/mc/nv44.o
nvkm-y += nvkm/subdev/mc/nv50.o
nvkm-y += nvkm/subdev/mc/g84.o
+32 −0
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/*
 * Copyright 2016 Red Hat Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Ben Skeggs <bskeggs@redhat.com>
 */
#include "priv.h"

const struct nvkm_mc_map
nv17_mc_reset[] = {
	{ 0x00001000, NVKM_ENGINE_GR },
	{ 0x00000100, NVKM_ENGINE_FIFO },
	{ 0x00000002, NVKM_ENGINE_MPEG },
	{}
};
+8 −12
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@@ -23,21 +23,17 @@
 */
#include "priv.h"

const struct nvkm_mc_map
static const struct nvkm_mc_map
nv50_mc_intr[] = {
	{ 0x04000000, NVKM_ENGINE_DISP },  /* DISP before FIFO, so pageflip-timestamping works! */
	{ 0x00000001, NVKM_ENGINE_MPEG },
	{ 0x00000100, NVKM_ENGINE_FIFO },
	{ 0x04000000, NVKM_ENGINE_DISP },
	{ 0x00001000, NVKM_ENGINE_GR },
	{ 0x00004000, NVKM_ENGINE_CIPHER },	/* NV84- */
	{ 0x00008000, NVKM_ENGINE_BSP },	/* NV84- */
	{ 0x00020000, NVKM_ENGINE_VP },	/* NV84- */
	{ 0x00100000, NVKM_SUBDEV_TIMER },
	{ 0x00200000, NVKM_SUBDEV_GPIO },	/* PMGR->GPIO */
	{ 0x00200000, NVKM_SUBDEV_I2C }, 	/* PMGR->I2C/AUX */
	{ 0x00000100, NVKM_ENGINE_FIFO },
	{ 0x00000001, NVKM_ENGINE_MPEG },
	{ 0x00001101, NVKM_SUBDEV_FB },
	{ 0x10000000, NVKM_SUBDEV_BUS },
	{ 0x80000000, NVKM_ENGINE_SW },
	{ 0x0002d101, NVKM_SUBDEV_FB },
	{ 0x00200000, NVKM_SUBDEV_GPIO },
	{ 0x00200000, NVKM_SUBDEV_I2C },
	{ 0x00100000, NVKM_SUBDEV_TIMER },
	{},
};

+2 −1
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@@ -30,10 +30,11 @@ void nv04_mc_intr_unarm(struct nvkm_mc *);
void nv04_mc_intr_rearm(struct nvkm_mc *);
u32 nv04_mc_intr_mask(struct nvkm_mc *);

extern const struct nvkm_mc_map nv17_mc_reset[];

void nv44_mc_init(struct nvkm_mc *);

void nv50_mc_init(struct nvkm_mc *);
extern const struct nvkm_mc_map nv50_mc_intr[];

void gf100_mc_intr_unarm(struct nvkm_mc *);
void gf100_mc_intr_rearm(struct nvkm_mc *);