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Commit 73549020 authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/mc/g84: define reset masks + intr cleanup 



Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent e56f90fe

drivers/gpu/drm/nouveau/include/nvkm/subdev/mc.h

+1 −0
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@ void nvkm_mc_unk260(struct nvkm_mc *, u32 data); 
int nv04_mc_new(struct nvkm_device *, int, struct nvkm_mc **);

int nv44_mc_new(struct nvkm_device *, int, struct nvkm_mc **);

int nv50_mc_new(struct nvkm_device *, int, struct nvkm_mc **);

int g84_mc_new(struct nvkm_device *, int, struct nvkm_mc **);

int g98_mc_new(struct nvkm_device *, int, struct nvkm_mc **);

int gt215_mc_new(struct nvkm_device *, int, struct nvkm_mc **);

int gf100_mc_new(struct nvkm_device *, int, struct nvkm_mc **);

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

+6 −6
Original line number Diff line number Diff line
@@ -926,7 +926,7 @@ nv84_chipset = { 
	.gpio = nv50_gpio_new,

	.i2c = nv50_i2c_new,

	.imem = nv50_instmem_new,

	.mc = nv50_mc_new,

	.mc = g84_mc_new,

	.mmu = nv50_mmu_new,

	.mxm = nv50_mxm_new,

	.pci = g84_pci_new,
@@ -958,7 +958,7 @@ nv86_chipset = { 
	.gpio = nv50_gpio_new,

	.i2c = nv50_i2c_new,

	.imem = nv50_instmem_new,

	.mc = nv50_mc_new,

	.mc = g84_mc_new,

	.mmu = nv50_mmu_new,

	.mxm = nv50_mxm_new,

	.pci = g84_pci_new,
@@ -990,7 +990,7 @@ nv92_chipset = { 
	.gpio = nv50_gpio_new,

	.i2c = nv50_i2c_new,

	.imem = nv50_instmem_new,

	.mc = nv50_mc_new,

	.mc = g84_mc_new,

	.mmu = nv50_mmu_new,

	.mxm = nv50_mxm_new,

	.pci = g84_pci_new,
@@ -1022,7 +1022,7 @@ nv94_chipset = { 
	.gpio = g94_gpio_new,

	.i2c = g94_i2c_new,

	.imem = nv50_instmem_new,

	.mc = nv50_mc_new,

	.mc = g84_mc_new,

	.mmu = nv50_mmu_new,

	.mxm = nv50_mxm_new,

	.pci = g94_pci_new,
@@ -1054,7 +1054,7 @@ nv96_chipset = { 
	.gpio = g94_gpio_new,

	.i2c = g94_i2c_new,

	.imem = nv50_instmem_new,

	.mc = nv50_mc_new,

	.mc = g84_mc_new,

	.mmu = nv50_mmu_new,

	.mxm = nv50_mxm_new,

	.pci = g94_pci_new,
@@ -1118,7 +1118,7 @@ nva0_chipset = { 
	.gpio = g94_gpio_new,

	.i2c = nv50_i2c_new,

	.imem = nv50_instmem_new,

	.mc = g98_mc_new,

	.mc = g84_mc_new,

	.mmu = nv50_mmu_new,

	.mxm = nv50_mxm_new,

	.pci = g94_pci_new,

drivers/gpu/drm/nouveau/nvkm/subdev/mc/Kbuild

+1 −0
Original line number Diff line number Diff line
@@ -2,6 +2,7 @@ nvkm-y += nvkm/subdev/mc/base.o 
nvkm-y += nvkm/subdev/mc/nv04.o

nvkm-y += nvkm/subdev/mc/nv44.o

nvkm-y += nvkm/subdev/mc/nv50.o

nvkm-y += nvkm/subdev/mc/g84.o

nvkm-y += nvkm/subdev/mc/g98.o

nvkm-y += nvkm/subdev/mc/gt215.o

nvkm-y += nvkm/subdev/mc/gf100.o

drivers/gpu/drm/nouveau/nvkm/subdev/mc/g84.c

0 → 100644
+68 −0
Original line number Diff line number Diff line 
/*

 * Copyright 2012 Red Hat Inc.

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice shall be included in

 * all copies or substantial portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL

 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR

 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,

 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 * OTHER DEALINGS IN THE SOFTWARE.

 *

 * Authors: Ben Skeggs

 */

#include "priv.h"



static const struct nvkm_mc_map

g84_mc_reset[] = {

	{ 0x04008000, NVKM_ENGINE_BSP },

	{ 0x02004000, NVKM_ENGINE_CIPHER },

	{ 0x01020000, NVKM_ENGINE_VP },

	{ 0x00400002, NVKM_ENGINE_MPEG },

	{ 0x00201000, NVKM_ENGINE_GR },

	{ 0x00000100, NVKM_ENGINE_FIFO },

	{}

};



const struct nvkm_mc_map

g84_mc_intr[] = {

	{ 0x04000000, NVKM_ENGINE_DISP },

	{ 0x00020000, NVKM_ENGINE_VP },

	{ 0x00008000, NVKM_ENGINE_BSP },

	{ 0x00004000, NVKM_ENGINE_CIPHER },

	{ 0x00001000, NVKM_ENGINE_GR },

	{ 0x00000100, NVKM_ENGINE_FIFO },

	{ 0x00000001, NVKM_ENGINE_MPEG },

	{ 0x0002d101, NVKM_SUBDEV_FB },

	{ 0x10000000, NVKM_SUBDEV_BUS },

	{ 0x00200000, NVKM_SUBDEV_GPIO },

	{ 0x00200000, NVKM_SUBDEV_I2C },

	{ 0x00100000, NVKM_SUBDEV_TIMER },

	{},

};



static const struct nvkm_mc_func

g84_mc = {

	.init = nv50_mc_init,

	.intr = g84_mc_intr,

	.intr_unarm = nv04_mc_intr_unarm,

	.intr_rearm = nv04_mc_intr_rearm,

	.intr_mask = nv04_mc_intr_mask,

	.reset = g84_mc_reset,

};



int

g84_mc_new(struct nvkm_device *device, int index, struct nvkm_mc **pmc)

{

	return nvkm_mc_new_(&g84_mc, device, index, pmc);

}