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Commit 8fe3d333 authored by Eric Huang's avatar Eric Huang Committed by Alex Deucher
Browse files

drm/amd/powerplay: add GFX/SYS clockgating support for ELM/BAF 



Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Acked-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarEric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 03e3905f

drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_clockpowergating.c

+247 −0
Original line number Diff line number Diff line
@@ -151,3 +151,250 @@ int ellesmere_phm_powergate_samu(struct pp_hwmgr *hwmgr, bool bgate) 
	return 0;

}



int ellesmere_phm_update_clock_gatings(struct pp_hwmgr *hwmgr,

					const uint32_t *msg_id)

{

	PPSMC_Msg msg;

	uint32_t value;



	switch ((*msg_id & PP_GROUP_MASK) >> PP_GROUP_SHIFT) {

	case PP_GROUP_GFX:

		switch ((*msg_id & PP_BLOCK_MASK) >> PP_BLOCK_SHIFT) {

		case PP_BLOCK_GFX_CG:

			if (PP_STATE_SUPPORT_CG & *msg_id) {

				msg = ((*msg_id & PP_STATE_MASK) & PP_STATE_CG) ?

						PPSMC_MSG_EnableClockGatingFeature :

						PPSMC_MSG_DisableClockGatingFeature;

				value = CG_GFX_CGCG_MASK;



				if (smum_send_msg_to_smc_with_parameter(

						hwmgr->smumgr, msg, value))

					return -1;

			}

			if (PP_STATE_SUPPORT_LS & *msg_id) {

				msg = (*msg_id & PP_STATE_MASK) & PP_STATE_LS

					? PPSMC_MSG_EnableClockGatingFeature

					: PPSMC_MSG_DisableClockGatingFeature;

				value = CG_GFX_CGLS_MASK;



				if (smum_send_msg_to_smc_with_parameter(

						hwmgr->smumgr, msg, value))

					return -1;

			}

			break;



		case PP_BLOCK_GFX_3D:

			if (PP_STATE_SUPPORT_CG & *msg_id) {

				msg = ((*msg_id & PP_STATE_MASK) & PP_STATE_CG) ?

						PPSMC_MSG_EnableClockGatingFeature :

						PPSMC_MSG_DisableClockGatingFeature;

				value = CG_GFX_3DCG_MASK;



				if (smum_send_msg_to_smc_with_parameter(

						hwmgr->smumgr, msg, value))

					return -1;

			}



			if  (PP_STATE_SUPPORT_LS & *msg_id) {

				msg = (*msg_id & PP_STATE_MASK) & PP_STATE_LS ?

						PPSMC_MSG_EnableClockGatingFeature :

						PPSMC_MSG_DisableClockGatingFeature;

				value = CG_GFX_3DLS_MASK;



				if (smum_send_msg_to_smc_with_parameter(

						hwmgr->smumgr, msg, value))

					return -1;

			}

			break;



		case PP_BLOCK_GFX_RLC:

			if (PP_STATE_SUPPORT_LS & *msg_id) {

				msg = (*msg_id & PP_STATE_MASK) & PP_STATE_LS ?

						PPSMC_MSG_EnableClockGatingFeature :

						PPSMC_MSG_DisableClockGatingFeature;

				value = CG_GFX_RLC_LS_MASK;



				if (smum_send_msg_to_smc_with_parameter(

						hwmgr->smumgr, msg, value))

					return -1;

			}

			break;



		case PP_BLOCK_GFX_CP:

			if (PP_STATE_SUPPORT_LS & *msg_id) {

				msg = (*msg_id & PP_STATE_MASK) & PP_STATE_LS ?

						PPSMC_MSG_EnableClockGatingFeature :

						PPSMC_MSG_DisableClockGatingFeature;

				value = CG_GFX_CP_LS_MASK;



				if (smum_send_msg_to_smc_with_parameter(

						hwmgr->smumgr, msg, value))

					return -1;

			}

			break;



		case PP_BLOCK_GFX_MG:

			if (PP_STATE_SUPPORT_CG & *msg_id) {

				msg = ((*msg_id & PP_STATE_MASK) & PP_STATE_CG)	?

						PPSMC_MSG_EnableClockGatingFeature :

						PPSMC_MSG_DisableClockGatingFeature;

				value = (CG_CPF_MGCG_MASK | CG_RLC_MGCG_MASK |

						CG_GFX_OTHERS_MGCG_MASK);



				if (smum_send_msg_to_smc_with_parameter(

						hwmgr->smumgr, msg, value))

					return -1;

			}

			break;



		default:

			return -1;

		}

		break;



	case PP_GROUP_SYS:

		switch ((*msg_id & PP_BLOCK_MASK) >> PP_BLOCK_SHIFT) {

		case PP_BLOCK_SYS_BIF:

			if (PP_STATE_SUPPORT_CG & *msg_id) {

				msg = (*msg_id & PP_STATE_MASK) & PP_STATE_CG ?

						PPSMC_MSG_EnableClockGatingFeature :

						PPSMC_MSG_DisableClockGatingFeature;

				value = CG_SYS_BIF_MGCG_MASK;



				if (smum_send_msg_to_smc_with_parameter(

						hwmgr->smumgr, msg, value))

					return -1;

			}

			if  (PP_STATE_SUPPORT_LS & *msg_id) {

				msg = (*msg_id & PP_STATE_MASK) & PP_STATE_LS ?

						PPSMC_MSG_EnableClockGatingFeature :

						PPSMC_MSG_DisableClockGatingFeature;

				value = CG_SYS_BIF_MGLS_MASK;



				if (smum_send_msg_to_smc_with_parameter(

						hwmgr->smumgr, msg, value))

					return -1;

			}

			break;



		case PP_BLOCK_SYS_MC:

			if (PP_STATE_SUPPORT_CG & *msg_id) {

				msg = ((*msg_id & PP_STATE_MASK) & PP_STATE_CG)	?

						PPSMC_MSG_EnableClockGatingFeature :

						PPSMC_MSG_DisableClockGatingFeature;

				value = CG_SYS_MC_MGCG_MASK;



				if (smum_send_msg_to_smc_with_parameter(

						hwmgr->smumgr, msg, value))

					return -1;

			}



			if (PP_STATE_SUPPORT_LS & *msg_id) {

				msg = (*msg_id & PP_STATE_MASK) & PP_STATE_LS ?

						PPSMC_MSG_EnableClockGatingFeature :

						PPSMC_MSG_DisableClockGatingFeature;

				value = CG_SYS_MC_MGLS_MASK;



				if (smum_send_msg_to_smc_with_parameter(

						hwmgr->smumgr, msg, value))

					return -1;

			}

			break;



		case PP_BLOCK_SYS_DRM:

			if (PP_STATE_SUPPORT_CG & *msg_id) {

				msg = (*msg_id & PP_STATE_MASK) & PP_STATE_CG ?

						PPSMC_MSG_EnableClockGatingFeature :

						PPSMC_MSG_DisableClockGatingFeature;

				value = CG_SYS_DRM_MGCG_MASK;



				if (smum_send_msg_to_smc_with_parameter(

						hwmgr->smumgr, msg, value))

					return -1;

			}

			if (PP_STATE_SUPPORT_LS & *msg_id) {

				msg = (*msg_id & PP_STATE_MASK) & PP_STATE_LS ?

						PPSMC_MSG_EnableClockGatingFeature :

						PPSMC_MSG_DisableClockGatingFeature;

				value = CG_SYS_DRM_MGLS_MASK;



				if (smum_send_msg_to_smc_with_parameter(

						hwmgr->smumgr, msg, value))

					return -1;

			}

			break;



		case PP_BLOCK_SYS_HDP:

			if (PP_STATE_SUPPORT_CG & *msg_id) {

				msg = ((*msg_id & PP_STATE_MASK) & PP_STATE_CG) ?

						PPSMC_MSG_EnableClockGatingFeature :

						PPSMC_MSG_DisableClockGatingFeature;

				value = CG_SYS_HDP_MGCG_MASK;



				if (smum_send_msg_to_smc_with_parameter(

						hwmgr->smumgr, msg, value))

					return -1;

			}



			if (PP_STATE_SUPPORT_LS & *msg_id) {

				msg = (*msg_id & PP_STATE_MASK) & PP_STATE_LS ?

						PPSMC_MSG_EnableClockGatingFeature :

						PPSMC_MSG_DisableClockGatingFeature;

				value = CG_SYS_HDP_MGLS_MASK;



				if (smum_send_msg_to_smc_with_parameter(

						hwmgr->smumgr, msg, value))

					return -1;

			}

			break;



		case PP_BLOCK_SYS_SDMA:

			if (PP_STATE_SUPPORT_CG & *msg_id) {

				msg = ((*msg_id & PP_STATE_MASK) & PP_STATE_CG)	?

						PPSMC_MSG_EnableClockGatingFeature :

						PPSMC_MSG_DisableClockGatingFeature;

				value = CG_SYS_SDMA_MGCG_MASK;



				if (smum_send_msg_to_smc_with_parameter(

						hwmgr->smumgr, msg, value))

					return -1;

			}



			if (PP_STATE_SUPPORT_LS & *msg_id) {

				msg = (*msg_id & PP_STATE_MASK) & PP_STATE_LS ?

						PPSMC_MSG_EnableClockGatingFeature :

						PPSMC_MSG_DisableClockGatingFeature;

				value = CG_SYS_SDMA_MGLS_MASK;



				if (smum_send_msg_to_smc_with_parameter(

						hwmgr->smumgr, msg, value))

					return -1;

			}

			break;



		case PP_BLOCK_SYS_ROM:

			if (PP_STATE_SUPPORT_CG & *msg_id) {

				msg = ((*msg_id & PP_STATE_MASK) & PP_STATE_CG) ?

						PPSMC_MSG_EnableClockGatingFeature :

						PPSMC_MSG_DisableClockGatingFeature;

				value = CG_SYS_ROM_MASK;



				if (smum_send_msg_to_smc_with_parameter(

						hwmgr->smumgr, msg, value))

					return -1;

			}

			break;



		default:

			return -1;



		}

		break;



	default:

		return -1;



	}



	return 0;

}

drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_clockpowergating.h

+2 −0
Original line number Diff line number Diff line
@@ -33,5 +33,7 @@ int ellesmere_phm_powerdown_uvd(struct pp_hwmgr *hwmgr); 
int ellesmere_phm_powergate_samu(struct pp_hwmgr *hwmgr, bool bgate);

int ellesmere_phm_powergate_acp(struct pp_hwmgr *hwmgr, bool bgate);

int ellesmere_phm_disable_clock_power_gating(struct pp_hwmgr *hwmgr);

int ellesmere_phm_update_clock_gatings(struct pp_hwmgr *hwmgr,

					const uint32_t *msg_id);



#endif /* _ELLESMERE_CLOCK_POWER_GATING_H_ */

drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_hwmgr.c

+1 −0
Original line number Diff line number Diff line
@@ -4670,6 +4670,7 @@ static const struct pp_hwmgr_func ellesmere_hwmgr_funcs = { 
	.powergate_uvd = ellesmere_phm_powergate_uvd,

	.powergate_vce = ellesmere_phm_powergate_vce,

	.disable_clock_power_gating = ellesmere_phm_disable_clock_power_gating,

	.update_clock_gatings = ellesmere_phm_update_clock_gatings,

	.notify_smc_display_config_after_ps_adjustment = ellesmere_notify_smc_display_config_after_ps_adjustment,

	.display_config_changed = ellesmere_display_configuration_changed_task,

	.set_max_fan_pwm_output = ellesmere_set_max_fan_pwm_output,