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Commit 79488c58 authored by Emil Tantilov's avatar Emil Tantilov Committed by Jeff Kirsher
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ixgbe: fix endianess when writing driver version to firmware 



This patch makes sure that register writes are in little endian and
also converts the reads back to big-endian.

Signed-off-by: default avatarEmil Tantilov <emil.s.tantilov@intel.com>
Tested-by: default avatarStephen Ko <stephen.s.ko@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 0224d663

drivers/net/ethernet/intel/ixgbe/ixgbe_common.c

+8 −8
Original line number Original line Diff line number Diff line
@@ -3341,7 +3341,7 @@ static u8 ixgbe_calculate_checksum(u8 *buffer, u32 length) 
 *  Communicates with the manageability block.  On success return 0

 *  Communicates with the manageability block.  On success return 0

 *  else return IXGBE_ERR_HOST_INTERFACE_COMMAND.

 *  else return IXGBE_ERR_HOST_INTERFACE_COMMAND.

 **/

 **/

static s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u8 *buffer,

static s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,

					u32 length)

					u32 length)

{

{

	u32 hicr, i;

	u32 hicr, i;
@@ -3374,7 +3374,7 @@ static s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u8 *buffer, 
	 */

	 */

	for (i = 0; i < dword_len; i++)

	for (i = 0; i < dword_len; i++)

		IXGBE_WRITE_REG_ARRAY(hw, IXGBE_FLEX_MNG,

		IXGBE_WRITE_REG_ARRAY(hw, IXGBE_FLEX_MNG,

				      i, *((u32 *)buffer + i));

				      i, cpu_to_le32(buffer[i]));





	/* Setting this bit tells the ARC that a new command is pending. */

	/* Setting this bit tells the ARC that a new command is pending. */

	IXGBE_WRITE_REG(hw, IXGBE_HICR, hicr | IXGBE_HICR_C);

	IXGBE_WRITE_REG(hw, IXGBE_HICR, hicr | IXGBE_HICR_C);
@@ -3398,9 +3398,10 @@ static s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u8 *buffer, 
	dword_len = hdr_size >> 2;

	dword_len = hdr_size >> 2;





	/* first pull in the header so we know the buffer length */

	/* first pull in the header so we know the buffer length */

	for (i = 0; i < dword_len; i++)

	for (i = 0; i < dword_len; i++) {

		*((u32 *)buffer + i) =

		buffer[i] = IXGBE_READ_REG_ARRAY(hw, IXGBE_FLEX_MNG, i);

			IXGBE_READ_REG_ARRAY(hw, IXGBE_FLEX_MNG, i);

		le32_to_cpus(&buffer[i]);

	}





	/* If there is any thing in data position pull it in */

	/* If there is any thing in data position pull it in */

	buf_len = ((struct ixgbe_hic_hdr *)buffer)->buf_len;

	buf_len = ((struct ixgbe_hic_hdr *)buffer)->buf_len;
@@ -3418,8 +3419,7 @@ static s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u8 *buffer, 




	/* Pull in the rest of the buffer (i is where we left off)*/

	/* Pull in the rest of the buffer (i is where we left off)*/

	for (; i < buf_len; i++)

	for (; i < buf_len; i++)

		*((u32 *)buffer + i) =

		buffer[i] = IXGBE_READ_REG_ARRAY(hw, IXGBE_FLEX_MNG, i);

			IXGBE_READ_REG_ARRAY(hw, IXGBE_FLEX_MNG, i);





out:

out:

	return ret_val;

	return ret_val;
@@ -3465,7 +3465,7 @@ s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min, 
	fw_cmd.pad2 = 0;

	fw_cmd.pad2 = 0;





	for (i = 0; i <= FW_CEM_MAX_RETRIES; i++) {

	for (i = 0; i <= FW_CEM_MAX_RETRIES; i++) {

		ret_val = ixgbe_host_interface_command(hw, (u8 *)&fw_cmd,

		ret_val = ixgbe_host_interface_command(hw, (u32 *)&fw_cmd,

						       sizeof(fw_cmd));

						       sizeof(fw_cmd));

		if (ret_val != 0)

		if (ret_val != 0)

			continue;

			continue;