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Commit 6801c18c authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Daniel Vetter
Browse files

drm/i915: Add HSW CRT output readout support 

Call intel_ddi_get_config() to get the pipe_bpp settings from
DDI.

The sync polarity settings from DDI are irrelevant for CRT
output, so override them with data from the ADPA register.

v2: Extract intel_crt_get_flags()

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=69691


Tested-by: default avatarQingshuai Tian <qingshuai.tian@intel.com>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent f2335330

drivers/gpu/drm/i915/intel_crt.c

+28 −6
Original line number Diff line number Diff line
@@ -83,13 +83,11 @@ static bool intel_crt_get_hw_state(struct intel_encoder *encoder, 
	return true;

}



static void intel_crt_get_config(struct intel_encoder *encoder,

				 struct intel_crtc_config *pipe_config)

static unsigned int intel_crt_get_flags(struct intel_encoder *encoder)

{

	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;

	struct intel_crt *crt = intel_encoder_to_crt(encoder);

	u32 tmp, flags = 0;

	int dotclock;



	tmp = I915_READ(crt->adpa_reg);
@@ -103,16 +101,37 @@ static void intel_crt_get_config(struct intel_encoder *encoder, 
	else

		flags |= DRM_MODE_FLAG_NVSYNC;



	pipe_config->adjusted_mode.flags |= flags;

	return flags;

}



static void intel_crt_get_config(struct intel_encoder *encoder,

				 struct intel_crtc_config *pipe_config)

{

	struct drm_device *dev = encoder->base.dev;

	int dotclock;



	pipe_config->adjusted_mode.flags |= intel_crt_get_flags(encoder);



	dotclock = pipe_config->port_clock;



	if (HAS_PCH_SPLIT(dev_priv->dev))

	if (HAS_PCH_SPLIT(dev))

		ironlake_check_encoder_dotclock(pipe_config, dotclock);



	pipe_config->adjusted_mode.clock = dotclock;

}



static void hsw_crt_get_config(struct intel_encoder *encoder,

			       struct intel_crtc_config *pipe_config)

{

	intel_ddi_get_config(encoder, pipe_config);



	pipe_config->adjusted_mode.flags &= ~(DRM_MODE_FLAG_PHSYNC |

					      DRM_MODE_FLAG_NHSYNC |

					      DRM_MODE_FLAG_PVSYNC |

					      DRM_MODE_FLAG_NVSYNC);

	pipe_config->adjusted_mode.flags |= intel_crt_get_flags(encoder);

}



/* Note: The caller is required to filter out dpms modes not supported by the

 * platform. */

static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
@@ -804,6 +823,9 @@ void intel_crt_init(struct drm_device *dev) 
	crt->base.mode_set = intel_crt_mode_set;

	crt->base.disable = intel_disable_crt;

	crt->base.enable = intel_enable_crt;

	if (IS_HASWELL(dev))

		crt->base.get_config = hsw_crt_get_config;

	else

		crt->base.get_config = intel_crt_get_config;

	if (I915_HAS_HOTPLUG(dev))

		crt->base.hpd_pin = HPD_CRT;

drivers/gpu/drm/i915/intel_ddi.c

+2 −2
Original line number Diff line number Diff line
@@ -1269,7 +1269,7 @@ static void intel_ddi_hot_plug(struct intel_encoder *intel_encoder) 
		intel_dp_check_link_status(intel_dp);

}



static void intel_ddi_get_config(struct intel_encoder *encoder,

void intel_ddi_get_config(struct intel_encoder *encoder,

			  struct intel_crtc_config *pipe_config)

{

	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;

drivers/gpu/drm/i915/intel_drv.h

+2 −0
Original line number Diff line number Diff line
@@ -828,5 +828,7 @@ extern void ironlake_check_encoder_dotclock(const struct intel_crtc_config *pipe 


extern bool intel_crtc_active(struct drm_crtc *crtc);

extern void i915_disable_vga_mem(struct drm_device *dev);

extern void intel_ddi_get_config(struct intel_encoder *encoder,

				 struct intel_crtc_config *pipe_config);



#endif /* __INTEL_DRV_H__ */