Loading arch/x86/boot/compressed/misc_64.c +2 −2 Original line number Original line Diff line number Diff line Loading @@ -25,7 +25,7 @@ /* /* * Getting to provable safe in place decompression is hard. * Getting to provable safe in place decompression is hard. * Worst case behaviours need to be analized. * Worst case behaviours need to be analyzed. * Background information: * Background information: * * * The file layout is: * The file layout is: Loading Loading @@ -94,7 +94,7 @@ * Adding 32768 instead of 32767 just makes for round numbers. * Adding 32768 instead of 32767 just makes for round numbers. * Adding the decompressor_size is necessary as it musht live after all * Adding the decompressor_size is necessary as it musht live after all * of the data as well. Last I measured the decompressor is about 14K. * of the data as well. Last I measured the decompressor is about 14K. * 10K of actuall data and 4K of bss. * 10K of actual data and 4K of bss. * * */ */ Loading arch/x86/kernel/io_apic_64.c +2 −2 Original line number Original line Diff line number Diff line Loading @@ -1770,7 +1770,7 @@ __setup("no_timer_check", notimercheck); /* /* * * * IRQ's that are handled by the PIC in the MPS IOAPIC case. * IRQs that are handled by the PIC in the MPS IOAPIC case. * - IRQ2 is the cascade IRQ, and cannot be a io-apic IRQ. * - IRQ2 is the cascade IRQ, and cannot be a io-apic IRQ. * Linux doesn't really care, as it's not actually used * Linux doesn't really care, as it's not actually used * for any interrupt handling anyway. * for any interrupt handling anyway. Loading Loading @@ -1921,7 +1921,7 @@ void destroy_irq(unsigned int irq) } } /* /* * MSI mesage composition * MSI message composition */ */ #ifdef CONFIG_PCI_MSI #ifdef CONFIG_PCI_MSI static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg) static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg) Loading arch/x86/kernel/mce_64.c +2 −2 Original line number Original line Diff line number Diff line Loading @@ -320,7 +320,7 @@ void do_machine_check(struct pt_regs * regs, long error_code) #ifdef CONFIG_X86_MCE_INTEL #ifdef CONFIG_X86_MCE_INTEL /*** /*** * mce_log_therm_throt_event - Logs the thermal throttling event to mcelog * mce_log_therm_throt_event - Logs the thermal throttling event to mcelog * @cpu: The CPU on which the event occured. * @cpu: The CPU on which the event occurred. * @status: Event status information * @status: Event status information * * * This function should be called by the thermal interrupt after the * This function should be called by the thermal interrupt after the Loading Loading @@ -688,7 +688,7 @@ static int __init mcheck_disable(char *str) return 1; return 1; } } /* mce=off disables machine check. Note you can reenable it later /* mce=off disables machine check. Note you can re-enable it later using sysfs. using sysfs. mce=TOLERANCELEVEL (number, see above) mce=TOLERANCELEVEL (number, see above) mce=bootlog Log MCEs from before booting. Disabled by default on AMD. mce=bootlog Log MCEs from before booting. Disabled by default on AMD. Loading arch/x86/kernel/signal_64.c +1 −1 Original line number Original line Diff line number Diff line Loading @@ -410,7 +410,7 @@ static void do_signal(struct pt_regs *regs) signr = get_signal_to_deliver(&info, &ka, regs, NULL); signr = get_signal_to_deliver(&info, &ka, regs, NULL); if (signr > 0) { if (signr > 0) { /* Reenable any watchpoints before delivering the /* Re-enable any watchpoints before delivering the * signal to user space. The processor register will * signal to user space. The processor register will * have been cleared if the watchpoint triggered * have been cleared if the watchpoint triggered * inside the kernel. * inside the kernel. Loading arch/x86/kernel/smpboot_64.c +1 −1 Original line number Original line Diff line number Diff line Loading @@ -350,7 +350,7 @@ void __cpuinit start_secondary(void) /* /* * We need to hold call_lock, so there is no inconsistency * We need to hold call_lock, so there is no inconsistency * between the time smp_call_function() determines number of * between the time smp_call_function() determines number of * IPI receipients, and the time when the determination is made * IPI recipients, and the time when the determination is made * for which cpus receive the IPI in genapic_flat.c. Holding this * for which cpus receive the IPI in genapic_flat.c. Holding this * lock helps us to not include this cpu in a currently in progress * lock helps us to not include this cpu in a currently in progress * smp_call_function(). * smp_call_function(). Loading Loading
arch/x86/boot/compressed/misc_64.c +2 −2 Original line number Original line Diff line number Diff line Loading @@ -25,7 +25,7 @@ /* /* * Getting to provable safe in place decompression is hard. * Getting to provable safe in place decompression is hard. * Worst case behaviours need to be analized. * Worst case behaviours need to be analyzed. * Background information: * Background information: * * * The file layout is: * The file layout is: Loading Loading @@ -94,7 +94,7 @@ * Adding 32768 instead of 32767 just makes for round numbers. * Adding 32768 instead of 32767 just makes for round numbers. * Adding the decompressor_size is necessary as it musht live after all * Adding the decompressor_size is necessary as it musht live after all * of the data as well. Last I measured the decompressor is about 14K. * of the data as well. Last I measured the decompressor is about 14K. * 10K of actuall data and 4K of bss. * 10K of actual data and 4K of bss. * * */ */ Loading
arch/x86/kernel/io_apic_64.c +2 −2 Original line number Original line Diff line number Diff line Loading @@ -1770,7 +1770,7 @@ __setup("no_timer_check", notimercheck); /* /* * * * IRQ's that are handled by the PIC in the MPS IOAPIC case. * IRQs that are handled by the PIC in the MPS IOAPIC case. * - IRQ2 is the cascade IRQ, and cannot be a io-apic IRQ. * - IRQ2 is the cascade IRQ, and cannot be a io-apic IRQ. * Linux doesn't really care, as it's not actually used * Linux doesn't really care, as it's not actually used * for any interrupt handling anyway. * for any interrupt handling anyway. Loading Loading @@ -1921,7 +1921,7 @@ void destroy_irq(unsigned int irq) } } /* /* * MSI mesage composition * MSI message composition */ */ #ifdef CONFIG_PCI_MSI #ifdef CONFIG_PCI_MSI static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg) static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg) Loading
arch/x86/kernel/mce_64.c +2 −2 Original line number Original line Diff line number Diff line Loading @@ -320,7 +320,7 @@ void do_machine_check(struct pt_regs * regs, long error_code) #ifdef CONFIG_X86_MCE_INTEL #ifdef CONFIG_X86_MCE_INTEL /*** /*** * mce_log_therm_throt_event - Logs the thermal throttling event to mcelog * mce_log_therm_throt_event - Logs the thermal throttling event to mcelog * @cpu: The CPU on which the event occured. * @cpu: The CPU on which the event occurred. * @status: Event status information * @status: Event status information * * * This function should be called by the thermal interrupt after the * This function should be called by the thermal interrupt after the Loading Loading @@ -688,7 +688,7 @@ static int __init mcheck_disable(char *str) return 1; return 1; } } /* mce=off disables machine check. Note you can reenable it later /* mce=off disables machine check. Note you can re-enable it later using sysfs. using sysfs. mce=TOLERANCELEVEL (number, see above) mce=TOLERANCELEVEL (number, see above) mce=bootlog Log MCEs from before booting. Disabled by default on AMD. mce=bootlog Log MCEs from before booting. Disabled by default on AMD. Loading
arch/x86/kernel/signal_64.c +1 −1 Original line number Original line Diff line number Diff line Loading @@ -410,7 +410,7 @@ static void do_signal(struct pt_regs *regs) signr = get_signal_to_deliver(&info, &ka, regs, NULL); signr = get_signal_to_deliver(&info, &ka, regs, NULL); if (signr > 0) { if (signr > 0) { /* Reenable any watchpoints before delivering the /* Re-enable any watchpoints before delivering the * signal to user space. The processor register will * signal to user space. The processor register will * have been cleared if the watchpoint triggered * have been cleared if the watchpoint triggered * inside the kernel. * inside the kernel. Loading
arch/x86/kernel/smpboot_64.c +1 −1 Original line number Original line Diff line number Diff line Loading @@ -350,7 +350,7 @@ void __cpuinit start_secondary(void) /* /* * We need to hold call_lock, so there is no inconsistency * We need to hold call_lock, so there is no inconsistency * between the time smp_call_function() determines number of * between the time smp_call_function() determines number of * IPI receipients, and the time when the determination is made * IPI recipients, and the time when the determination is made * for which cpus receive the IPI in genapic_flat.c. Holding this * for which cpus receive the IPI in genapic_flat.c. Holding this * lock helps us to not include this cpu in a currently in progress * lock helps us to not include this cpu in a currently in progress * smp_call_function(). * smp_call_function(). Loading