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Commit 542f869f authored by Russell King's avatar Russell King Committed by Russell King
Browse files

Merge branch 'for-rmk' of git://gitorious.org/linux-gemini/mainline into devel



Conflicts:
	arch/arm/mm/Kconfig

Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parents e8b374bb 839e642f
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+13 −0
Original line number Diff line number Diff line
@@ -502,6 +502,13 @@ P: Richard Purdie
M:	rpurdie@rpsys.net
S:	Maintained

ARM/CORTINA SYSTEMS GEMINI ARM ARCHITECTURE
P:	Paulius Zaleckas
M:	paulius.zaleckas@teltonika.lt
L:	linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
T:	git gitorious.org/linux-gemini/mainline.git
S:	Maintained

ARM/EZX SMARTPHONES (A780, A910, A1200, E680, ROKR E2 and ROKR E6)
P:	Daniel Ribeiro
M:	drwyrm@gmail.com
@@ -513,6 +520,12 @@ L: openezx-devel@lists.openezx.org (subscribers-only)
W:	http://www.openezx.org/
S:	Maintained

ARM/FARADAY FA526 PORT
P:	Paulius Zaleckas
M:	paulius.zaleckas@teltonika.lt
L:	linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
S:	Maintained

ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
P:	Sascha Hauer
M:	kernel@pengutronix.de
+10 −0
Original line number Diff line number Diff line
@@ -276,6 +276,14 @@ config ARCH_EP93XX
	help
	  This enables support for the Cirrus EP93xx series of CPUs.

config ARCH_GEMINI
	bool "Cortina Systems Gemini"
	select CPU_FA526
	select GENERIC_GPIO
	select ARCH_REQUIRE_GPIOLIB
	help
	  Support for the Cortina Systems Gemini family SoCs

config ARCH_FOOTBRIDGE
	bool "FootBridge"
	select CPU_SA110
@@ -616,6 +624,8 @@ source "arch/arm/mach-ep93xx/Kconfig"

source "arch/arm/mach-footbridge/Kconfig"

source "arch/arm/mach-gemini/Kconfig"

source "arch/arm/mach-integrator/Kconfig"

source "arch/arm/mach-iop32x/Kconfig"
+2 −0
Original line number Diff line number Diff line
@@ -72,6 +72,7 @@ tune-$(CONFIG_CPU_ARM920T) :=-mtune=arm9tdmi
tune-$(CONFIG_CPU_ARM922T)	:=-mtune=arm9tdmi
tune-$(CONFIG_CPU_ARM925T)	:=-mtune=arm9tdmi
tune-$(CONFIG_CPU_ARM926T)	:=-mtune=arm9tdmi
tune-$(CONFIG_CPU_FA526)	:=-mtune=arm9tdmi
tune-$(CONFIG_CPU_SA110)	:=-mtune=strongarm110
tune-$(CONFIG_CPU_SA1100)	:=-mtune=strongarm1100
tune-$(CONFIG_CPU_XSCALE)	:=$(call cc-option,-mtune=xscale,-mtune=strongarm110) -Wa,-mcpu=xscale
@@ -113,6 +114,7 @@ endif
    plat-$(CONFIG_PLAT_PXA)	   := pxa
 machine-$(CONFIG_ARCH_L7200)	   := l7200
 machine-$(CONFIG_ARCH_INTEGRATOR) := integrator
 machine-$(CONFIG_ARCH_GEMINI)     := gemini
 textofs-$(CONFIG_ARCH_CLPS711X)   := 0x00028000
 machine-$(CONFIG_ARCH_CLPS711X)   := clps711x
 machine-$(CONFIG_ARCH_IOP32X)	   := iop32x
+26 −0
Original line number Diff line number Diff line
@@ -465,6 +465,20 @@ __armv7_mmu_cache_on:
		mcr	p15, 0, r0, c7, c5, 4	@ ISB
		mov	pc, r12

__fa526_cache_on:
		mov	r12, lr
		bl	__setup_mmu
		mov	r0, #0
		mcr	p15, 0, r0, c7, c7, 0	@ Invalidate whole cache
		mcr	p15, 0, r0, c7, c10, 4	@ drain write buffer
		mcr	p15, 0, r0, c8, c7, 0	@ flush UTLB
		mrc	p15, 0, r0, c1, c0, 0	@ read control reg
		orr	r0, r0, #0x1000		@ I-cache enable
		bl	__common_mmu_cache_on
		mov	r0, #0
		mcr	p15, 0, r0, c8, c7, 0	@ flush UTLB
		mov	pc, r12

__arm6_mmu_cache_on:
		mov	r12, lr
		bl	__setup_mmu
@@ -654,6 +668,12 @@ proc_types:
		b	__armv4_mmu_cache_off
		b	__armv5tej_mmu_cache_flush

		.word	0x66015261		@ FA526
		.word	0xff01fff1
		b	__fa526_cache_on
		b	__armv4_mmu_cache_off
		b	__fa526_cache_flush

		@ These match on the architecture ID

		.word	0x00020000		@ ARMv4T
@@ -793,6 +813,12 @@ __armv4_mpu_cache_flush:
		mcr	p15, 0, ip, c7, c10, 4	@ drain WB
		mov	pc, lr
		
__fa526_cache_flush:
		mov	r1, #0
		mcr	p15, 0, r1, c7, c14, 0	@ clean and invalidate D cache
		mcr	p15, 0, r1, c7, c5, 0	@ flush I cache
		mcr	p15, 0, r1, c7, c10, 4	@ drain WB
		mov	pc, lr

__armv6_mmu_cache_flush:
		mov	r1, #0
+8 −0
Original line number Diff line number Diff line
@@ -46,6 +46,14 @@
# define MULTI_CACHE 1
#endif

#if defined(CONFIG_CPU_FA526)
# ifdef _CACHE
#  define MULTI_CACHE 1
# else
#  define _CACHE fa
# endif
#endif

#if defined(CONFIG_CPU_ARM926T)
# ifdef _CACHE
#  define MULTI_CACHE 1
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