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Commit 4e8dbe9e authored by Thomas Gleixner's avatar Thomas Gleixner
Browse files

Merge branch 'irq/gic-4.5' of... 

Merge branch 'irq/gic-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core

Pull the GIC related updates from Marc Zyngier:

 "Not a lot this time (what a relief!), but an interesting series from
  Linus Walleij coming out of his work converting the ARM RealView
  platforms to DT, and a couple of mundane fixes."
parents ef0bf620 a27d21e0

Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt

+1 −0
Original line number Diff line number Diff line
@@ -18,6 +18,7 @@ Main node required properties: 
	"arm,cortex-a9-gic"

	"arm,gic-400"

	"arm,pl390"

	"arm,tc11mp-gic"

	"brcm,brahma-b15-gic"

	"qcom,msm-8660-qgic"

	"qcom,msm-qgic2"

drivers/irqchip/Kconfig

+5 −0
Original line number Diff line number Diff line
@@ -8,6 +8,11 @@ config ARM_GIC 
	select IRQ_DOMAIN_HIERARCHY

	select MULTI_IRQ_HANDLER



config ARM_GIC_MAX_NR

	int

	default 2 if ARCH_REALVIEW

	default 1



config ARM_GIC_V2M

	bool

	depends on ARM_GIC

drivers/irqchip/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -21,6 +21,7 @@ obj-$(CONFIG_ARCH_SUNXI) += irq-sun4i.o 
obj-$(CONFIG_ARCH_SUNXI)		+= irq-sunxi-nmi.o

obj-$(CONFIG_ARCH_SPEAR3XX)		+= spear-shirq.o

obj-$(CONFIG_ARM_GIC)			+= irq-gic.o irq-gic-common.o

obj-$(CONFIG_REALVIEW_DT)		+= irq-gic-realview.o

obj-$(CONFIG_ARM_GIC_V2M)		+= irq-gic-v2m.o

obj-$(CONFIG_ARM_GIC_V3)		+= irq-gic-v3.o irq-gic-common.o

obj-$(CONFIG_ARM_GIC_V3_ITS)		+= irq-gic-v3-its.o irq-gic-v3-its-pci-msi.o irq-gic-v3-its-platform-msi.o

drivers/irqchip/irq-gic-realview.c

0 → 100644
+43 −0
Original line number Diff line number Diff line 
/*

 * Special GIC quirks for the ARM RealView

 * Copyright (C) 2015 Linus Walleij

 */

#include <linux/of.h>

#include <linux/regmap.h>

#include <linux/mfd/syscon.h>

#include <linux/bitops.h>

#include <linux/irqchip.h>

#include <linux/irqchip/arm-gic.h>



#define REALVIEW_SYS_LOCK_OFFSET	0x20

#define REALVIEW_PB11MP_SYS_PLD_CTRL1	0x74

#define VERSATILE_LOCK_VAL		0xA05F

#define PLD_INTMODE_MASK		BIT(22)|BIT(23)|BIT(24)

#define PLD_INTMODE_LEGACY		0x0

#define PLD_INTMODE_NEW_DCC		BIT(22)

#define PLD_INTMODE_NEW_NO_DCC		BIT(23)

#define PLD_INTMODE_FIQ_ENABLE		BIT(24)



static int __init

realview_gic_of_init(struct device_node *node, struct device_node *parent)

{

	static struct regmap *map;



	/* The PB11MPCore GIC needs to be configured in the syscon */

	map = syscon_regmap_lookup_by_compatible("arm,realview-pb11mp-syscon");

	if (!IS_ERR(map)) {

		/* new irq mode with no DCC */

		regmap_write(map, REALVIEW_SYS_LOCK_OFFSET,

			     VERSATILE_LOCK_VAL);

		regmap_update_bits(map, REALVIEW_PB11MP_SYS_PLD_CTRL1,

				   PLD_INTMODE_NEW_NO_DCC,

				   PLD_INTMODE_MASK);

		regmap_write(map, REALVIEW_SYS_LOCK_OFFSET, 0x0000);

		pr_info("TC11MP GIC: set up interrupt controller to NEW mode, no DCC\n");

	} else {

		pr_err("TC11MP GIC setup: could not find syscon\n");

		return -ENXIO;

	}

	return gic_of_init(node, parent);

}

IRQCHIP_DECLARE(armtc11mp_gic, "arm,tc11mp-gic", realview_gic_of_init);

drivers/irqchip/irq-gic-v2m.c

+1 −1
Original line number Diff line number Diff line
@@ -389,7 +389,7 @@ int __init gicv2m_of_init(struct device_node *node, struct irq_domain *parent) 


		ret = gicv2m_init_one(child, parent);

		if (ret) {

			of_node_put(node);

			of_node_put(child);

			break;

		}

	}