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Commit ef0bf620 authored by Thomas Gleixner's avatar Thomas Gleixner
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Merge branch 'irq/wire-msi-bridge' of...

Merge branch 'irq/wire-msi-bridge' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core

Pull the MSI wire bridge implementation from Marc Zyngier along with
the first user of it. This is infrastructure to support a wired
interrupt to MSI interrupt brigde. The first user is mbigen found in
Hisilicon ARM SoCs.
parents 425a5072 a6c2f87b
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+5 −2
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@@ -587,7 +587,7 @@ used to control it:

  modprobe ipmi_watchdog timeout=<t> pretimeout=<t> action=<action type>
      preaction=<preaction type> preop=<preop type> start_now=x
      nowayout=x ifnum_to_use=n
      nowayout=x ifnum_to_use=n panic_wdt_timeout=<t>

ifnum_to_use specifies which interface the watchdog timer should use.
The default is -1, which means to pick the first one registered.
@@ -597,7 +597,9 @@ is the amount of seconds before the reset that the pre-timeout panic will
occur (if pretimeout is zero, then pretimeout will not be enabled).  Note
that the pretimeout is the time before the final timeout.  So if the
timeout is 50 seconds and the pretimeout is 10 seconds, then the pretimeout
will occur in 40 second (10 seconds before the timeout).
will occur in 40 second (10 seconds before the timeout). The panic_wdt_timeout
is the value of timeout which is set on kernel panic, in order to let actions
such as kdump to occur during panic.

The action may be "reset", "power_cycle", or "power_off", and
specifies what to do when the timer times out, and defaults to
@@ -634,6 +636,7 @@ for configuring the watchdog:
	ipmi_watchdog.preop=<preop type>
	ipmi_watchdog.start_now=x
	ipmi_watchdog.nowayout=x
	ipmi_watchdog.panic_wdt_timeout=<t>

The options are the same as the module parameter options.

+0 −18
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@@ -49,24 +49,6 @@ specified through DTS. Following are the DTS used:-
The device tree documentation for the keystone machines are located at
        Documentation/devicetree/bindings/arm/keystone/keystone.txt

Known issues & workaround
-------------------------

Some of the device drivers used on keystone are re-used from that from
DaVinci and other TI SoCs. These device drivers may use clock APIs directly.
Some of the keystone specific drivers such as netcp uses run time power
management API instead to enable clock. As this API has limitations on
keystone, following workaround is needed to boot Linux.

   Add 'clk_ignore_unused' to the bootargs env variable in u-boot. Otherwise
   clock frameworks will try to disable clocks that are unused and disable
   the hardware. This is because netcp related power domain and clock
   domains are enabled in u-boot as run time power management API currently
   doesn't enable clocks for netcp due to a limitation. This workaround is
   expected to be removed in the future when proper API support becomes
   available. Until then, this work around is needed.


Document Author
---------------
Murali Karicheri <m-karicheri2@ti.com>
+3 −0
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@@ -70,3 +70,6 @@ use_per_node_hctx=[0/1]: Default: 0
     parameter.
  1: The multi-queue block layer is instantiated with a hardware dispatch
     queue for each CPU node in the system.

use_lightnvm=[0/1]: Default: 0
  Register device with LightNVM. Requires blk-mq to be used.
+4 −0
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@@ -11,6 +11,10 @@ Required properties:
      0 = active high
      1 = active low

Optional properties:
- little-endian : GPIO registers are used as little endian. If not
                  present registers are used as big endian by default.

Example:

gpio0: gpio@1100 {
+74 −0
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Hisilicon mbigen device tree bindings.
=======================================

Mbigen means: message based interrupt generator.

MBI is kind of msi interrupt only used on Non-PCI devices.

To reduce the wired interrupt number connected to GIC,
Hisilicon designed mbigen to collect and generate interrupt.


Non-pci devices can connect to mbigen and generate the
interrupt by writing ITS register.

The mbigen chip and devices connect to mbigen have the following properties:

Mbigen main node required properties:
-------------------------------------------
- compatible: Should be "hisilicon,mbigen-v2"

- reg: Specifies the base physical address and size of the Mbigen
  registers.

- interrupt controller: Identifies the node as an interrupt controller

- msi-parent: Specifies the MSI controller this mbigen use.
  For more detail information,please refer to the generic msi-parent binding in
  Documentation/devicetree/bindings/interrupt-controller/msi.txt.

- num-pins: the total number of pins implemented in this Mbigen
  instance.

- #interrupt-cells : Specifies the number of cells needed to encode an
  interrupt source. The value must be 2.

  The 1st cell is hardware pin number of the interrupt.This number is local to
  each mbigen chip and in the range from 0 to the maximum interrupts number
  of the mbigen.

  The 2nd cell is the interrupt trigger type.
	The value of this cell should be:
	1: rising edge triggered
	or
	4: high level triggered

Examples:

	mbigen_device_gmac:intc {
			compatible = "hisilicon,mbigen-v2";
			reg = <0x0 0xc0080000 0x0 0x10000>;
			interrupt-controller;
			msi-parent = <&its_dsa 0x40b1c>;
			num-pins = <9>;
			#interrupt-cells = <2>;
	};

Devices connect to mbigen required properties:
----------------------------------------------------
-interrupt-parent: Specifies the mbigen device node which device connected.

-interrupts:Specifies the interrupt source.
 For the specific information of each cell in this property,please refer to
 the "interrupt-cells" description mentioned above.

Examples:
	gmac0: ethernet@c2080000 {
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0 0xc2080000 0 0x20000>,
		      <0 0xc0000000 0 0x1000>;
		interrupt-parent  = <&mbigen_device_gmac>;
		interrupts =	<656 1>,
				<657 1>;
	};
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