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Commit 4e68af0b authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull i2c fixes from Wolfram Sang:
 "I2C has some driver bugfixes, module autoload fixes, and driver
  enablement on some architectures"

* 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
  i2c: imx: defer probe if bus recovery GPIOs are not ready
  i2c: designware: Avoid aborted transfers with fast reacting I2C slaves
  i2c: i801: Fix I2C Block Read on 8-Series/C220 and later
  i2c: xgene: Avoid dma_buffer overrun
  i2c: digicolor: Fix module autoload
  i2c: xlr: Fix module autoload for OF registration
  i2c: xlp9xx: Fix module autoload
  i2c: jz4780: Fix module autoload
  i2c: allow configuration of imx driver for ColdFire architecture
  i2c: mark device nodes only in case of successful instantiation
  i2c: rk3x: Give the tuning value 0 during rk3x_i2c_v0_calc_timings
  i2c: hix5hd2: allow build with ARCH_HISI
parents 7f2145b0 533169d1
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+6 −6
Original line number Original line Diff line number Diff line
@@ -79,10 +79,10 @@ config I2C_AMD8111


config I2C_HIX5HD2
config I2C_HIX5HD2
	tristate "Hix5hd2 high-speed I2C driver"
	tristate "Hix5hd2 high-speed I2C driver"
	depends on ARCH_HIX5HD2 || COMPILE_TEST
	depends on ARCH_HISI || ARCH_HIX5HD2 || COMPILE_TEST
	help
	help
	  Say Y here to include support for high-speed I2C controller in the
	  Say Y here to include support for the high-speed I2C controller
	  Hisilicon based hix5hd2 SoCs.
	  used in HiSilicon hix5hd2 SoCs.


	  This driver can also be built as a module. If so, the module
	  This driver can also be built as a module. If so, the module
	  will be called i2c-hix5hd2.
	  will be called i2c-hix5hd2.
@@ -589,10 +589,10 @@ config I2C_IMG


config I2C_IMX
config I2C_IMX
	tristate "IMX I2C interface"
	tristate "IMX I2C interface"
	depends on ARCH_MXC || ARCH_LAYERSCAPE
	depends on ARCH_MXC || ARCH_LAYERSCAPE || COLDFIRE
	help
	help
	  Say Y here if you want to use the IIC bus controller on
	  Say Y here if you want to use the IIC bus controller on
	  the Freescale i.MX/MXC or Layerscape processors.
	  the Freescale i.MX/MXC, Layerscape or ColdFire processors.


	  This driver can also be built as a module.  If so, the module
	  This driver can also be built as a module.  If so, the module
	  will be called i2c-imx.
	  will be called i2c-imx.
+14 −3
Original line number Original line Diff line number Diff line
@@ -95,6 +95,9 @@
#define DW_IC_STATUS_TFE		BIT(2)
#define DW_IC_STATUS_TFE		BIT(2)
#define DW_IC_STATUS_MST_ACTIVITY	BIT(5)
#define DW_IC_STATUS_MST_ACTIVITY	BIT(5)


#define DW_IC_SDA_HOLD_RX_SHIFT		16
#define DW_IC_SDA_HOLD_RX_MASK		GENMASK(23, DW_IC_SDA_HOLD_RX_SHIFT)

#define DW_IC_ERR_TX_ABRT	0x1
#define DW_IC_ERR_TX_ABRT	0x1


#define DW_IC_TAR_10BITADDR_MASTER BIT(12)
#define DW_IC_TAR_10BITADDR_MASTER BIT(12)
@@ -420,12 +423,20 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
	/* Configure SDA Hold Time if required */
	/* Configure SDA Hold Time if required */
	reg = dw_readl(dev, DW_IC_COMP_VERSION);
	reg = dw_readl(dev, DW_IC_COMP_VERSION);
	if (reg >= DW_IC_SDA_HOLD_MIN_VERS) {
	if (reg >= DW_IC_SDA_HOLD_MIN_VERS) {
		if (dev->sda_hold_time) {
		if (!dev->sda_hold_time) {
			dw_writel(dev, dev->sda_hold_time, DW_IC_SDA_HOLD);
		} else {
			/* Keep previous hold time setting if no one set it */
			/* Keep previous hold time setting if no one set it */
			dev->sda_hold_time = dw_readl(dev, DW_IC_SDA_HOLD);
			dev->sda_hold_time = dw_readl(dev, DW_IC_SDA_HOLD);
		}
		}
		/*
		 * Workaround for avoiding TX arbitration lost in case I2C
		 * slave pulls SDA down "too quickly" after falling egde of
		 * SCL by enabling non-zero SDA RX hold. Specification says it
		 * extends incoming SDA low to high transition while SCL is
		 * high but it apprears to help also above issue.
		 */
		if (!(dev->sda_hold_time & DW_IC_SDA_HOLD_RX_MASK))
			dev->sda_hold_time |= 1 << DW_IC_SDA_HOLD_RX_SHIFT;
		dw_writel(dev, dev->sda_hold_time, DW_IC_SDA_HOLD);
	} else {
	} else {
		dev_warn(dev->dev,
		dev_warn(dev->dev,
			"Hardware too old to adjust SDA hold time.\n");
			"Hardware too old to adjust SDA hold time.\n");
+1 −0
Original line number Original line Diff line number Diff line
@@ -368,6 +368,7 @@ static const struct of_device_id dc_i2c_match[] = {
	{ .compatible = "cnxt,cx92755-i2c" },
	{ .compatible = "cnxt,cx92755-i2c" },
	{ },
	{ },
};
};
MODULE_DEVICE_TABLE(of, dc_i2c_match);


static struct platform_driver dc_i2c_driver = {
static struct platform_driver dc_i2c_driver = {
	.probe   = dc_i2c_probe,
	.probe   = dc_i2c_probe,
+13 −3
Original line number Original line Diff line number Diff line
@@ -146,6 +146,7 @@
#define SMBHSTCFG_HST_EN	1
#define SMBHSTCFG_HST_EN	1
#define SMBHSTCFG_SMB_SMI_EN	2
#define SMBHSTCFG_SMB_SMI_EN	2
#define SMBHSTCFG_I2C_EN	4
#define SMBHSTCFG_I2C_EN	4
#define SMBHSTCFG_SPD_WD	0x10


/* TCO configuration bits for TCOCTL */
/* TCO configuration bits for TCOCTL */
#define TCOCTL_EN		0x0100
#define TCOCTL_EN		0x0100
@@ -865,9 +866,16 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr,
		block = 1;
		block = 1;
		break;
		break;
	case I2C_SMBUS_I2C_BLOCK_DATA:
	case I2C_SMBUS_I2C_BLOCK_DATA:
		/* NB: page 240 of ICH5 datasheet shows that the R/#W
		/*
		 * bit should be cleared here, even when reading */
		 * NB: page 240 of ICH5 datasheet shows that the R/#W
		outb_p((addr & 0x7f) << 1, SMBHSTADD(priv));
		 * bit should be cleared here, even when reading.
		 * However if SPD Write Disable is set (Lynx Point and later),
		 * the read will fail if we don't set the R/#W bit.
		 */
		outb_p(((addr & 0x7f) << 1) |
		       ((priv->original_hstcfg & SMBHSTCFG_SPD_WD) ?
			(read_write & 0x01) : 0),
		       SMBHSTADD(priv));
		if (read_write == I2C_SMBUS_READ) {
		if (read_write == I2C_SMBUS_READ) {
			/* NB: page 240 of ICH5 datasheet also shows
			/* NB: page 240 of ICH5 datasheet also shows
			 * that DATA1 is the cmd field when reading */
			 * that DATA1 is the cmd field when reading */
@@ -1573,6 +1581,8 @@ static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id)
		/* Disable SMBus interrupt feature if SMBus using SMI# */
		/* Disable SMBus interrupt feature if SMBus using SMI# */
		priv->features &= ~FEATURE_IRQ;
		priv->features &= ~FEATURE_IRQ;
	}
	}
	if (temp & SMBHSTCFG_SPD_WD)
		dev_info(&dev->dev, "SPD Write Disable is set\n");


	/* Clear special mode bits */
	/* Clear special mode bits */
	if (priv->features & (FEATURE_SMBUS_PEC | FEATURE_BLOCK_BUFFER))
	if (priv->features & (FEATURE_SMBUS_PEC | FEATURE_BLOCK_BUFFER))
+7 −4
Original line number Original line Diff line number Diff line
@@ -1009,7 +1009,10 @@ static int i2c_imx_init_recovery_info(struct imx_i2c_struct *i2c_imx,
	rinfo->sda_gpio = of_get_named_gpio(pdev->dev.of_node, "sda-gpios", 0);
	rinfo->sda_gpio = of_get_named_gpio(pdev->dev.of_node, "sda-gpios", 0);
	rinfo->scl_gpio = of_get_named_gpio(pdev->dev.of_node, "scl-gpios", 0);
	rinfo->scl_gpio = of_get_named_gpio(pdev->dev.of_node, "scl-gpios", 0);


	if (!gpio_is_valid(rinfo->sda_gpio) ||
	if (rinfo->sda_gpio == -EPROBE_DEFER ||
	    rinfo->scl_gpio == -EPROBE_DEFER) {
		return -EPROBE_DEFER;
	} else if (!gpio_is_valid(rinfo->sda_gpio) ||
		   !gpio_is_valid(rinfo->scl_gpio) ||
		   !gpio_is_valid(rinfo->scl_gpio) ||
		   IS_ERR(i2c_imx->pinctrl_pins_default) ||
		   IS_ERR(i2c_imx->pinctrl_pins_default) ||
		   IS_ERR(i2c_imx->pinctrl_pins_gpio)) {
		   IS_ERR(i2c_imx->pinctrl_pins_gpio)) {
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