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Commit 2e603ad9 authored by Dirk Behme's avatar Dirk Behme Committed by Shawn Guo
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ARM: i.MX6: clk: add i.MX6 DualLite differences 



The CCM_CBCMR register (address 0x02C4018) has different meaning
between the i.MX6 Quad/Dual and the i.MX6 Solo/DualLite.

Compared to the i.MX6 Quad/Dual, the CCM_CBCMR register in the
i.MX6 Solo/DualLite doesn't have a gpu3d_shader configuration and
moves the gpu2_core configuration at that place.

Handle these i.MX6 Quad/Dual vs. i.MX6 Solo/DualLite clock differences
by using cpu_is_mx6dl().

Signed-off-by: default avatarDirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent b3a9c315

arch/arm/mach-imx/clk-imx6q.c

+8 −1
Original line number Diff line number Diff line
@@ -481,6 +481,13 @@ int __init mx6q_clocks_init(void) 
	clk[esai]         = imx_clk_gate2("esai",          "esai_podf",         base + 0x6c, 16);

	clk[gpt_ipg]      = imx_clk_gate2("gpt_ipg",       "ipg",               base + 0x6c, 20);

	clk[gpt_ipg_per]  = imx_clk_gate2("gpt_ipg_per",   "ipg_per",           base + 0x6c, 22);

	if (cpu_is_imx6dl())

		/*

		 * The multiplexer and divider of imx6q clock gpu3d_shader get

		 * redefined/reused as gpu2d_core_sel and gpu2d_core_podf on imx6dl.

		 */

		clk[gpu2d_core] = imx_clk_gate2("gpu2d_core", "gpu3d_shader", base + 0x6c, 24);

	else

		clk[gpu2d_core] = imx_clk_gate2("gpu2d_core", "gpu2d_core_podf", base + 0x6c, 24);

	clk[gpu3d_core]   = imx_clk_gate2("gpu3d_core",    "gpu3d_core_podf",   base + 0x6c, 26);

	clk[hdmi_iahb]    = imx_clk_gate2("hdmi_iahb",     "ahb",               base + 0x70, 0);