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Commit 16c4f227 authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/fifo: make external class definitions into pointers 



Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent aabf19c2

drivers/gpu/drm/nouveau/core/engine/device/nv04.c

+2 −2
Original line number Original line Diff line number Diff line
@@ -57,7 +57,7 @@ nv04_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv04_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv04_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv04_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv04_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv04_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv04_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;
@@ -75,7 +75,7 @@ nv04_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv04_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv04_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv04_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv04_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv04_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv04_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

drivers/gpu/drm/nouveau/core/engine/device/nv10.c

+7 −7
Original line number Original line Diff line number Diff line
@@ -76,7 +76,7 @@ nv10_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv10_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv10_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv10_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv10_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;
@@ -95,7 +95,7 @@ nv10_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv10_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv10_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv10_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv10_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;
@@ -114,7 +114,7 @@ nv10_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv10_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv10_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv10_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv10_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;
@@ -133,7 +133,7 @@ nv10_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv10_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv10_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv10_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv10_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;
@@ -152,7 +152,7 @@ nv10_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv10_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv10_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;
@@ -171,7 +171,7 @@ nv10_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv10_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv10_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;
@@ -190,7 +190,7 @@ nv10_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv10_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv10_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

drivers/gpu/drm/nouveau/core/engine/device/nv20.c

+4 −4
Original line number Original line Diff line number Diff line
@@ -60,7 +60,7 @@ nv20_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv20_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv20_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;
@@ -79,7 +79,7 @@ nv20_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv25_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv25_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;
@@ -98,7 +98,7 @@ nv20_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv25_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv25_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;
@@ -117,7 +117,7 @@ nv20_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv2a_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv2a_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

drivers/gpu/drm/nouveau/core/engine/device/nv30.c

+5 −5
Original line number Original line Diff line number Diff line
@@ -60,7 +60,7 @@ nv30_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv30_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv30_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;
@@ -79,7 +79,7 @@ nv30_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv35_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv35_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;
@@ -98,7 +98,7 @@ nv30_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv30_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv30_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv31_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv31_mpeg_oclass;
@@ -118,7 +118,7 @@ nv30_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv35_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv35_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv31_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv31_mpeg_oclass;
@@ -138,7 +138,7 @@ nv30_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv34_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv34_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv31_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv31_mpeg_oclass;

drivers/gpu/drm/nouveau/core/engine/device/nv40.c

+16 −16
Original line number Original line Diff line number Diff line
@@ -63,7 +63,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv40_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv40_mpeg_oclass;
@@ -84,7 +84,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv41_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv41_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv40_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv40_mpeg_oclass;
@@ -105,7 +105,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv41_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv41_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv40_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv40_mpeg_oclass;
@@ -126,7 +126,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv41_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv41_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv40_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv40_mpeg_oclass;
@@ -147,7 +147,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;
@@ -168,7 +168,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv41_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv41_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;
@@ -189,7 +189,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv41_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv41_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;
@@ -210,7 +210,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv41_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv41_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;
@@ -231,7 +231,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv44_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv44_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;
@@ -252,7 +252,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv44_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv44_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;
@@ -273,7 +273,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv44_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv44_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;
@@ -294,7 +294,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv44_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv44_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;
@@ -315,7 +315,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv44_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv44_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;
@@ -336,7 +336,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv44_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv44_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;
@@ -357,7 +357,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv44_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv44_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;
@@ -378,7 +378,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv44_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nv44_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv44_mpeg_oclass;