Loading drivers/gpu/drm/nouveau/core/engine/device/base.c +14 −13 Original line number Diff line number Diff line Loading @@ -161,25 +161,26 @@ nouveau_devobj_ctor(struct nouveau_object *parent, if ((boot0 & 0x1f000000) > 0) { device->chipset = (boot0 & 0x1ff00000) >> 20; switch (device->chipset & 0x1f0) { case 0x10: { case 0x010: { if (0x461 & (1 << (device->chipset & 0xf))) device->card_type = NV_10; else device->card_type = NV_11; break; } case 0x20: device->card_type = NV_20; break; case 0x30: device->card_type = NV_30; break; case 0x40: case 0x60: device->card_type = NV_40; break; case 0x50: case 0x80: case 0x90: case 0xa0: device->card_type = NV_50; break; case 0xc0: device->card_type = NV_C0; break; case 0xd0: device->card_type = NV_D0; break; case 0xe0: case 0xf0: device->card_type = NV_E0; break; case 0x020: device->card_type = NV_20; break; case 0x030: device->card_type = NV_30; break; case 0x040: case 0x060: device->card_type = NV_40; break; case 0x050: case 0x080: case 0x090: case 0x0a0: device->card_type = NV_50; break; case 0x0c0: device->card_type = NV_C0; break; case 0x0d0: device->card_type = NV_D0; break; case 0x0e0: case 0x0f0: case 0x100: device->card_type = NV_E0; break; default: break; } Loading drivers/gpu/drm/nouveau/core/engine/device/nve0.c +34 −0 Original line number Diff line number Diff line Loading @@ -174,6 +174,40 @@ nve0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_BSP ] = &nve0_bsp_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass; device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; #endif break; case 0x108: device->cname = "GK208"; device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; device->oclass[NVDEV_SUBDEV_GPIO ] = &nve0_gpio_oclass; device->oclass[NVDEV_SUBDEV_I2C ] = &nvd0_i2c_oclass; device->oclass[NVDEV_SUBDEV_CLOCK ] = &nvc0_clock_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_DEVINIT] = &nvc0_devinit_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = &nvc0_bus_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_FB ] = nvc0_fb_oclass; device->oclass[NVDEV_SUBDEV_LTCG ] = &nvc0_ltcg_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &nve0_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_VM ] = &nvc0_vmmgr_oclass; device->oclass[NVDEV_SUBDEV_BAR ] = &nvc0_bar_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvd0_dmaeng_oclass; #if 0 device->oclass[NVDEV_ENGINE_FIFO ] = &nve0_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass; device->oclass[NVDEV_ENGINE_GR ] = nvf0_graph_oclass; #endif device->oclass[NVDEV_ENGINE_DISP ] = &nvf0_disp_oclass; #if 0 device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass; device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass; device->oclass[NVDEV_ENGINE_COPY2 ] = &nve0_copy2_oclass; device->oclass[NVDEV_ENGINE_BSP ] = &nve0_bsp_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass; device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; #endif break; default: Loading Loading
drivers/gpu/drm/nouveau/core/engine/device/base.c +14 −13 Original line number Diff line number Diff line Loading @@ -161,25 +161,26 @@ nouveau_devobj_ctor(struct nouveau_object *parent, if ((boot0 & 0x1f000000) > 0) { device->chipset = (boot0 & 0x1ff00000) >> 20; switch (device->chipset & 0x1f0) { case 0x10: { case 0x010: { if (0x461 & (1 << (device->chipset & 0xf))) device->card_type = NV_10; else device->card_type = NV_11; break; } case 0x20: device->card_type = NV_20; break; case 0x30: device->card_type = NV_30; break; case 0x40: case 0x60: device->card_type = NV_40; break; case 0x50: case 0x80: case 0x90: case 0xa0: device->card_type = NV_50; break; case 0xc0: device->card_type = NV_C0; break; case 0xd0: device->card_type = NV_D0; break; case 0xe0: case 0xf0: device->card_type = NV_E0; break; case 0x020: device->card_type = NV_20; break; case 0x030: device->card_type = NV_30; break; case 0x040: case 0x060: device->card_type = NV_40; break; case 0x050: case 0x080: case 0x090: case 0x0a0: device->card_type = NV_50; break; case 0x0c0: device->card_type = NV_C0; break; case 0x0d0: device->card_type = NV_D0; break; case 0x0e0: case 0x0f0: case 0x100: device->card_type = NV_E0; break; default: break; } Loading
drivers/gpu/drm/nouveau/core/engine/device/nve0.c +34 −0 Original line number Diff line number Diff line Loading @@ -174,6 +174,40 @@ nve0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_BSP ] = &nve0_bsp_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass; device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; #endif break; case 0x108: device->cname = "GK208"; device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; device->oclass[NVDEV_SUBDEV_GPIO ] = &nve0_gpio_oclass; device->oclass[NVDEV_SUBDEV_I2C ] = &nvd0_i2c_oclass; device->oclass[NVDEV_SUBDEV_CLOCK ] = &nvc0_clock_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_DEVINIT] = &nvc0_devinit_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = &nvc0_bus_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_FB ] = nvc0_fb_oclass; device->oclass[NVDEV_SUBDEV_LTCG ] = &nvc0_ltcg_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &nve0_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_VM ] = &nvc0_vmmgr_oclass; device->oclass[NVDEV_SUBDEV_BAR ] = &nvc0_bar_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvd0_dmaeng_oclass; #if 0 device->oclass[NVDEV_ENGINE_FIFO ] = &nve0_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass; device->oclass[NVDEV_ENGINE_GR ] = nvf0_graph_oclass; #endif device->oclass[NVDEV_ENGINE_DISP ] = &nvf0_disp_oclass; #if 0 device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass; device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass; device->oclass[NVDEV_ENGINE_COPY2 ] = &nve0_copy2_oclass; device->oclass[NVDEV_ENGINE_BSP ] = &nve0_bsp_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass; device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; #endif break; default: Loading