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Commit 1640142b authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'linux-4.8' of git://github.com/skeggsb/linux into drm-next

Here's an initial drm-next pull for nouveau 4.8, highlights:
- GK20A/GM20B volt and clock improvements.
- Initial support for GP100/GP104 GPUs, GP104 will not yet support
acceleration due to NVIDIA having not released firmware for them as of yet.

* 'linux-4.8' of git://github.com/skeggsb/linux: (97 commits)
  drm/nouveau/bus: remove cpu_coherent flag
  drm/nouveau/ttm: remove special handling of coherent objects
  drm/nouveau: check for supported chipset before booting fbdev off the hw
  drm/nouveau/ce/gp104: initial support
  drm/nouveau/fifo/gp104: initial support
  drm/nouveau/disp/gp104: initial support
  drm/nouveau/dma/gp104: initial support
  drm/nouveau/ltc/gp104: initial support
  drm/nouveau/ibus/gp104: initial support
  drm/nouveau/i2c/gp104: initial support
  drm/nouveau/gpio/gp104: initial support
  drm/nouveau/fuse/gp104: initial support
  drm/nouveau/bus/gp104: initial support
  drm/nouveau/bar/gp104: initial support
  drm/nouveau/mmu/gp104: initial support
  drm/nouveau/fb/gp104: initial support
  drm/nouveau/imem/gp104: initial support
  drm/nouveau/devinit/gp104: initial support
  drm/nouveau/bios/gp104: initial support
  drm/nouveau/tmr/gp104: initial support
  ...
parents 6f6e68b3 aff51175
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+1 −0
Original line number Diff line number Diff line
@@ -29,6 +29,7 @@ struct nv_device_info_v0 {
#define NV_DEVICE_INFO_V0_FERMI                                            0x07
#define NV_DEVICE_INFO_V0_KEPLER                                           0x08
#define NV_DEVICE_INFO_V0_MAXWELL                                          0x09
#define NV_DEVICE_INFO_V0_PASCAL                                           0x0a
	__u8  family;
	__u8  pad06[2];
	__u64 ram_size;
+10 −0
Original line number Diff line number Diff line
@@ -39,6 +39,7 @@
#define KEPLER_CHANNEL_GPFIFO_A                       /* cla06f.h */ 0x0000a06f
#define KEPLER_CHANNEL_GPFIFO_B                       /* cla06f.h */ 0x0000a16f
#define MAXWELL_CHANNEL_GPFIFO_A                      /* cla06f.h */ 0x0000b06f
#define PASCAL_CHANNEL_GPFIFO_A                       /* cla06f.h */ 0x0000c06f

#define NV50_DISP                                     /* cl5070.h */ 0x00005070
#define G82_DISP                                      /* cl5070.h */ 0x00008270
@@ -50,6 +51,8 @@
#define GK110_DISP                                    /* cl5070.h */ 0x00009270
#define GM107_DISP                                    /* cl5070.h */ 0x00009470
#define GM200_DISP                                    /* cl5070.h */ 0x00009570
#define GP100_DISP                                    /* cl5070.h */ 0x00009770
#define GP104_DISP                                    /* cl5070.h */ 0x00009870

#define NV31_MPEG                                                    0x00003174
#define G82_MPEG                                                     0x00008274
@@ -86,6 +89,8 @@
#define GK110_DISP_CORE_CHANNEL_DMA                   /* cl507d.h */ 0x0000927d
#define GM107_DISP_CORE_CHANNEL_DMA                   /* cl507d.h */ 0x0000947d
#define GM200_DISP_CORE_CHANNEL_DMA                   /* cl507d.h */ 0x0000957d
#define GP100_DISP_CORE_CHANNEL_DMA                   /* cl507d.h */ 0x0000977d
#define GP104_DISP_CORE_CHANNEL_DMA                   /* cl507d.h */ 0x0000987d

#define NV50_DISP_OVERLAY_CHANNEL_DMA                 /* cl507e.h */ 0x0000507e
#define G82_DISP_OVERLAY_CHANNEL_DMA                  /* cl507e.h */ 0x0000827e
@@ -105,6 +110,8 @@
#define MAXWELL_A                                     /* cl9097.h */ 0x0000b097
#define MAXWELL_B                                     /* cl9097.h */ 0x0000b197

#define PASCAL_A                                      /* cl9097.h */ 0x0000c097

#define NV74_BSP                                                     0x000074b0

#define GT212_MSVLD                                                  0x000085b1
@@ -128,6 +135,8 @@
#define FERMI_DMA                                                    0x000090b5
#define KEPLER_DMA_COPY_A                                            0x0000a0b5
#define MAXWELL_DMA_COPY_A                                           0x0000b0b5
#define PASCAL_DMA_COPY_A                                            0x0000c0b5
#define PASCAL_DMA_COPY_B                                            0x0000c1b5

#define FERMI_DECOMPRESS                                             0x000090b8

@@ -137,6 +146,7 @@
#define KEPLER_COMPUTE_B                                             0x0000a1c0
#define MAXWELL_COMPUTE_A                                            0x0000b0c0
#define MAXWELL_COMPUTE_B                                            0x0000b1c0
#define PASCAL_COMPUTE_A                                             0x0000c0c0

#define NV74_CIPHER                                                  0x000074c1
#endif
+11 −7
Original line number Diff line number Diff line
@@ -33,7 +33,10 @@ enum nvkm_devidx {
	NVKM_ENGINE_CE0,
	NVKM_ENGINE_CE1,
	NVKM_ENGINE_CE2,
	NVKM_ENGINE_CE_LAST = NVKM_ENGINE_CE2,
	NVKM_ENGINE_CE3,
	NVKM_ENGINE_CE4,
	NVKM_ENGINE_CE5,
	NVKM_ENGINE_CE_LAST = NVKM_ENGINE_CE5,

	NVKM_ENGINE_CIPHER,
	NVKM_ENGINE_DISP,
@@ -50,7 +53,8 @@ enum nvkm_devidx {

	NVKM_ENGINE_NVENC0,
	NVKM_ENGINE_NVENC1,
	NVKM_ENGINE_NVENC_LAST = NVKM_ENGINE_NVENC1,
	NVKM_ENGINE_NVENC2,
	NVKM_ENGINE_NVENC_LAST = NVKM_ENGINE_NVENC2,

	NVKM_ENGINE_NVDEC,
	NVKM_ENGINE_PM,
@@ -102,6 +106,7 @@ struct nvkm_device {
		NV_C0    = 0xc0,
		NV_E0    = 0xe0,
		GM100    = 0x110,
		GP100    = 0x130,
	} card_type;
	u32 chipset;
	u8  chiprev;
@@ -136,7 +141,7 @@ struct nvkm_device {
	struct nvkm_volt *volt;

	struct nvkm_engine *bsp;
	struct nvkm_engine *ce[3];
	struct nvkm_engine *ce[6];
	struct nvkm_engine *cipher;
	struct nvkm_disp *disp;
	struct nvkm_dma *dma;
@@ -149,7 +154,7 @@ struct nvkm_device {
	struct nvkm_engine *mspdec;
	struct nvkm_engine *msppp;
	struct nvkm_engine *msvld;
	struct nvkm_engine *nvenc[2];
	struct nvkm_engine *nvenc[3];
	struct nvkm_engine *nvdec;
	struct nvkm_pm *pm;
	struct nvkm_engine *sec;
@@ -170,7 +175,6 @@ struct nvkm_device_func {
	void (*fini)(struct nvkm_device *, bool suspend);
	resource_size_t (*resource_addr)(struct nvkm_device *, unsigned bar);
	resource_size_t (*resource_size)(struct nvkm_device *, unsigned bar);
	bool cpu_coherent;
};

struct nvkm_device_quirk {
@@ -206,7 +210,7 @@ struct nvkm_device_chip {
	int (*volt    )(struct nvkm_device *, int idx, struct nvkm_volt **);

	int (*bsp     )(struct nvkm_device *, int idx, struct nvkm_engine **);
	int (*ce[3]   )(struct nvkm_device *, int idx, struct nvkm_engine **);
	int (*ce[6]   )(struct nvkm_device *, int idx, struct nvkm_engine **);
	int (*cipher  )(struct nvkm_device *, int idx, struct nvkm_engine **);
	int (*disp    )(struct nvkm_device *, int idx, struct nvkm_disp **);
	int (*dma     )(struct nvkm_device *, int idx, struct nvkm_dma **);
@@ -219,7 +223,7 @@ struct nvkm_device_chip {
	int (*mspdec  )(struct nvkm_device *, int idx, struct nvkm_engine **);
	int (*msppp   )(struct nvkm_device *, int idx, struct nvkm_engine **);
	int (*msvld   )(struct nvkm_device *, int idx, struct nvkm_engine **);
	int (*nvenc[2])(struct nvkm_device *, int idx, struct nvkm_engine **);
	int (*nvenc[3])(struct nvkm_device *, int idx, struct nvkm_engine **);
	int (*nvdec   )(struct nvkm_device *, int idx, struct nvkm_engine **);
	int (*pm      )(struct nvkm_device *, int idx, struct nvkm_pm **);
	int (*sec     )(struct nvkm_device *, int idx, struct nvkm_engine **);
+1 −0
Original line number Diff line number Diff line
@@ -28,6 +28,7 @@ struct nvkm_device_tegra {
	} iommu;

	int gpu_speedo;
	int gpu_speedo_id;
};

struct nvkm_device_tegra_func {
+2 −0
Original line number Diff line number Diff line
@@ -7,4 +7,6 @@ int gf100_ce_new(struct nvkm_device *, int, struct nvkm_engine **);
int gk104_ce_new(struct nvkm_device *, int, struct nvkm_engine **);
int gm107_ce_new(struct nvkm_device *, int, struct nvkm_engine **);
int gm200_ce_new(struct nvkm_device *, int, struct nvkm_engine **);
int gp100_ce_new(struct nvkm_device *, int, struct nvkm_engine **);
int gp104_ce_new(struct nvkm_device *, int, struct nvkm_engine **);
#endif
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