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Commit 07999587 authored Nov 07, 2013 by Stephen Warren

ARM: tegra: document reset properties in DT bindings



Update all the Tegra DT bindings to require resets/reset-names properties
where the HW module has reset inputs. Remove any entries from clocks or
clock-names that were only required to identify reset inputs, rather than
referring to real clocks.

This is a DT-ABI-incompatible change. It is the first of two changes
required for me to consider the Tegra DT bindings as stable, the other
being conversion to the common DMA DT bindings.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>

parent d8f64797

Documentation/devicetree/bindings/clock/nvidia,tegra114-car.txt

+4 −0

Original line number	Diff line number	Diff line
		@@ -15,6 +15,9 @@ Required properties :
		In clock consumers, this cell represents the clock ID exposed by the
		CAR. The assignments may be found in header file
		<dt-bindings/clock/tegra114-car.h>.
		- #reset-cells : Should be 1.
		In clock consumers, this cell represents the bit number in the CAR's
		array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.

		Example SoC include file:

		@@ -23,6 +26,7 @@ Example SoC include file:
		compatible = "nvidia,tegra114-car";
		reg = <0x60006000 0x1000>;
		#clock-cells = <1>;
		#reset-cells = <1>;
		};

		usb@c5004000 {

Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt

+4 −0

Original line number	Diff line number	Diff line
		@@ -15,6 +15,9 @@ Required properties :
		In clock consumers, this cell represents the clock ID exposed by the
		CAR. The assignments may be found in header file
		<dt-bindings/clock/tegra124-car.h>.
		- #reset-cells : Should be 1.
		In clock consumers, this cell represents the bit number in the CAR's
		array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.

		Example SoC include file:

		@@ -23,6 +26,7 @@ Example SoC include file:
		compatible = "nvidia,tegra124-car";
		reg = <0x60006000 0x1000>;
		#clock-cells = <1>;
		#reset-cells = <1>;
		};

		usb@c5004000 {

Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt

+4 −0

Original line number	Diff line number	Diff line
		@@ -15,6 +15,9 @@ Required properties :
		In clock consumers, this cell represents the clock ID exposed by the
		CAR. The assignments may be found in header file
		<dt-bindings/clock/tegra20-car.h>.
		- #reset-cells : Should be 1.
		In clock consumers, this cell represents the bit number in the CAR's
		array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.

		Example SoC include file:

		@@ -23,6 +26,7 @@ Example SoC include file:
		compatible = "nvidia,tegra20-car";
		reg = <0x60006000 0x1000>;
		#clock-cells = <1>;
		#reset-cells = <1>;
		};

		usb@c5004000 {

Documentation/devicetree/bindings/clock/nvidia,tegra30-car.txt

+4 −0

Original line number	Diff line number	Diff line
		@@ -15,6 +15,9 @@ Required properties :
		In clock consumers, this cell represents the clock ID exposed by the
		CAR. The assignments may be found in header file
		<dt-bindings/clock/tegra30-car.h>.
		- #reset-cells : Should be 1.
		In clock consumers, this cell represents the bit number in the CAR's
		array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.

		Example SoC include file:

		@@ -23,6 +26,7 @@ Example SoC include file:
		compatible = "nvidia,tegra30-car";
		reg = <0x60006000 0x1000>;
		#clock-cells = <1>;
		#reset-cells = <1>;
		};

		usb@c5004000 {

Documentation/devicetree/bindings/dma/tegra20-apbdma.txt

+6 −0

Original line number	Diff line number	Diff line
		@@ -7,6 +7,10 @@ Required properties:
		- interrupts: Should contain all of the per-channel DMA interrupts.
		- clocks: Must contain one entry, for the module clock.
		See ../clocks/clock-bindings.txt for details.
		- resets : Must contain an entry for each entry in reset-names.
		See ../reset/reset.txt for details.
		- reset-names : Must include the following entries:
		- dma

		Examples:

		@@ -30,4 +34,6 @@ apbdma: dma@6000a000 {
		0 150 0x04
		0 151 0x04 >;
		clocks = <&tegra_car 34>;
		resets = <&tegra_car 34>;
		reset-names = "dma";
		};